| /utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/ |
| H A D | halMVOP.c | 1039 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1129 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3170 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3289 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4373 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4407 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
5700 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
5803 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/ |
| H A D | halMVOP.c | 1024 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1114 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3223 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3340 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4566 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4600 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
5923 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
6027 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/ |
| H A D | halMVOP.c | 1015 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1105 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3179 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3291 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4345 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4379 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
5670 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
5774 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/ |
| H A D | halMVOP.c | 1024 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1118 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3153 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3271 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4361 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4395 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
5682 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
5785 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/ |
| H A D | halMVOP.c | 1041 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1131 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3173 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3293 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4405 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4439 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
5732 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
5835 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/ |
| H A D | halMVOP.c | 909 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
960 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2747 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
2817 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3474 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
3523 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| H A D | regMVOP.h | 310 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/ |
| H A D | halMVOP.c | 1033 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3190 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3326 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4509 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4543 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
5889 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
5993 u8Arg = VOP_REF_SELF_FLD; in HAL_MVOP_MaskDBRegCtrl()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/ |
| H A D | halMVOP.c | 1003 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1057 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2942 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3043 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4071 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4121 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/ |
| H A D | halMVOP.c | 951 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1002 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2814 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
2884 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3958 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4007 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/ |
| H A D | halMVOP.c | 983 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1034 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2942 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3033 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3965 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4012 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| H A D | regMVOP.h | 308 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/ |
| H A D | halMVOP.c | 827 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
866 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2088 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
|
| H A D | regMVOP.h | 292 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/ |
| H A D | halMVOP.c | 1026 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1080 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3091 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3196 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4382 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4432 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/ |
| H A D | halMVOP.c | 1028 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1082 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3100 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3208 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4361 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4411 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/ |
| H A D | halMVOP.c | 1016 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1068 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2995 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3083 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4379 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4426 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| H A D | regMVOP.h | 309 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/ |
| H A D | halMVOP.c | 1005 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1059 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3048 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3146 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4178 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4228 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| H A D | regMVOP.h | 312 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/ |
| H A D | halMVOP.c | 1024 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1078 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3068 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3169 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4323 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4373 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| H A D | regMVOP.h | 315 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/ |
| H A D | halMVOP.c | 1016 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1068 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
2995 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3083 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4384 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4431 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|
| H A D | regMVOP.h | 309 #define VOP_REF_SELF_FLD (BIT1) //source field flag set by internal timing generator macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/ |
| H A D | halMVOP.c | 1041 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
1095 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 1, VOP_REF_SELF_FLD); in HAL_MVOP_SetInputMode()
3149 HAL_WriteRegBit(VOP_MIRROR_CFG_HI, 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
3263 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_ResetReg()
4467 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 0, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
4517 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG_HI), 1, VOP_REF_SELF_FLD); in HAL_MVOP_SubSetInputMode()
|