| /utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/ |
| H A D | halMVOP.c | 884 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1406 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2725 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
2795 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
2937 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
2950 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3453 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
3917 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 304 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/ |
| H A D | halMVOP.c | 982 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1528 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2920 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3021 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3400 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3444 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4050 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4561 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 310 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/ |
| H A D | halMVOP.c | 926 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1470 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2792 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
2862 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3004 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3017 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3937 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4424 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/ |
| H A D | halMVOP.c | 1005 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1617 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3069 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3174 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3696 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3740 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4361 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4933 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 310 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/ |
| H A D | halMVOP.c | 1007 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1624 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3078 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3186 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3677 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3721 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4340 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4899 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/ |
| H A D | halMVOP.c | 995 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1536 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2978 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3066 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3848 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3892 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4358 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4849 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 302 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/ |
| H A D | halMVOP.c | 984 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1566 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3026 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3124 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3560 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3573 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4157 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4709 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 306 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/ |
| H A D | halMVOP.c | 1003 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1595 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3046 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3147 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3666 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3710 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4302 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4855 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 309 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/ |
| H A D | halMVOP.c | 995 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1536 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2978 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3066 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3848 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3892 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4363 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4854 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 302 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/ |
| H A D | halMVOP.c | 1020 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1672 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3127 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3241 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3738 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3782 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4446 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
5026 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/ |
| H A D | halMVOP.c | 962 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInputMode()
1504 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
2920 HAL_WriteRegBit(VOP_MIRROR_CFG, 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3011 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3944 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4440 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| H A D | regMVOP.h | 302 #define VOP_FIELD_FROM_ADDR (BIT3) //decide top or bot by diu addr macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/ |
| H A D | halMVOP.c | 1626 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3267 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3734 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3747 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4354 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4813 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/ |
| H A D | halMVOP.c | 1600 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3304 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3732 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3745 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4490 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
5011 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/ |
| H A D | halMVOP.c | 1656 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3318 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3722 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3735 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4547 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
5050 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/ |
| H A D | halMVOP.c | 1630 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3269 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3671 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3684 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4326 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4812 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/ |
| H A D | halMVOP.c | 1613 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3250 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3716 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3729 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4342 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4799 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/ |
| H A D | halMVOP.c | 1628 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetH264HardwireMode()
3271 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_ResetReg()
3738 HAL_WriteRegBit(VOP_MIRROR_CFG, 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
3751 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SetInterlaceType()
4386 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 1, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetInputMode()
4845 HAL_WriteRegBit(SUB_REG(VOP_MIRROR_CFG), 0, VOP_FIELD_FROM_ADDR); in HAL_MVOP_SubSetH264HardwireMode()
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