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Searched refs:VOP_DMA1 (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DhalMVOP.c1340 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1346 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1354 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1360 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1381 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1388 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
4663 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4669 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4677 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4683 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
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H A DregMVOP.h181 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DhalMVOP.c1338 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1346 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1352 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1373 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1380 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
4604 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4612 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4618 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4637 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4644 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
H A DregMVOP.h180 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DhalMVOP.c1342 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1348 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1366 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1378 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
4643 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4649 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4665 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4677 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
H A DregMVOP.h182 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DhalMVOP.c1319 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1333 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1351 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1358 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
4459 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4472 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4488 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4495 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
H A DregMVOP.h180 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DhalMVOP.c1355 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1367 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1386 HAL_WriteByteMask(VOP_DMA1, 0x01, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
1399 HAL_WriteByteMask(VOP_DMA1, 0x02, VOP_BURST_EXT); in HAL_MVOP_SetOutputTiming()
4749 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4761 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4778 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x01, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
4791 HAL_WriteByteMask(SUB_REG(VOP_DMA1), 0x02, VOP_BURST_EXT); in HAL_MVOP_SubSetOutputTiming()
H A DregMVOP.h182 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DhalMVOP.c1062 HAL_WriteByteMask(VOP_DMA1, 0x22, VOP_FORCE_HIGH|VOP_HI_TSH|VOP_BURST_EXT); in HAL_MVOP_SetInputMode()
1551 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
1582 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
1602 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
3256 HAL_WriteByte(VOP_DMA1, 0x22); in HAL_MVOP_ResetReg()
4961 HAL_WriteByte(SUB_REG(VOP_DMA1), 0x26); in HAL_MVOP_SubSetSynClk()
4989 HAL_WriteByte(SUB_REG(VOP_DMA1), 0x26); in HAL_MVOP_SubSetSynClk()
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DhalMVOP.c1053 HAL_WriteByteMask(VOP_DMA1, 0x22, VOP_FORCE_HIGH|VOP_HI_TSH|VOP_BURST_EXT); in HAL_MVOP_SetInputMode()
1525 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
1556 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
1576 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
3211 HAL_WriteByte(VOP_DMA1, 0x22); in HAL_MVOP_ResetReg()
4723 HAL_WriteByte(SUB_REG(VOP_DMA1), 0x26); in HAL_MVOP_SubSetSynClk()
4751 HAL_WriteByte(SUB_REG(VOP_DMA1), 0x26); in HAL_MVOP_SubSetSynClk()
H A DregMVOP.h183 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DhalMVOP.c1495 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
1526 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
1546 HAL_WriteByte(VOP_DMA1, 0x26); in HAL_MVOP_SetSynClk()
3222 HAL_WriteByte(VOP_DMA1, 0x22); in HAL_MVOP_ResetReg()
4922 HAL_WriteByte(SUB_REG(VOP_DMA1), 0x26); in HAL_MVOP_SubSetSynClk()
4950 HAL_WriteByte(SUB_REG(VOP_DMA1), 0x26); in HAL_MVOP_SubSetSynClk()
H A DregMVOP.h184 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/
H A DregMVOP.h178 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DregMVOP.h179 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DregMVOP.h180 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DregMVOP.h180 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DregMVOP.h180 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DregMVOP.h182 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DregMVOP.h181 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DregMVOP.h182 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DregMVOP.h180 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DregMVOP.h181 #define VOP_DMA1 (MVOP_REG_BASE + 0x29) //t3 new macro

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