| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 141 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 145 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 165 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 166 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 171 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 172 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 177 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 141 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 145 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 165 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 166 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 171 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 172 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 177 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 141 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 145 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 165 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 166 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 171 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 172 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 177 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 141 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 145 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 165 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 166 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 171 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 172 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 177 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 141 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 145 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 165 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 166 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 171 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 172 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 177 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 142 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 146 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 168 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 169 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 174 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 175 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 179 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/tee/ |
| H A D | halTSP_tee.c | 116 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00 + ((addr)<<2)))) macro 142 TSP_TSP1_REG(REG_TSP1_FW_DMA_ADDR_H) = (MS_U16)(u32FwAddr >> 16) & TSP_FW_DMA_ADDR_H_MASK; in HAL_TSP_Tee_Set_FWBuf() 146 TSP_TSP1_REG(REG_TSP1_ONEWAY) = TSP_TSP1_REG(REG_TSP1_ONEWAY) | TSP_FW_ONEWAY; in HAL_TSP_Tee_Set_FWBuf() 167 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 168 TSP_TSP1_REG(REG_TSP1_VQ0_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 169 TSP_TSP1_REG(REG_TSP1_VQ0_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 173 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 174 TSP_TSP1_REG(REG_TSP1_VQ1_BASE_H) = (MS_U16)((phyMiuAddr >> 16) & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 175 TSP_TSP1_REG(REG_TSP1_VQ1_SIZE) = (MS_U16)(u32UnitSize & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() 179 TSP_TSP1_REG(REG_TSP1_VQ2_BASE_L) = (MS_U16)(phyMiuAddr & 0xFFFF); in HAL_TSP_Tee_Set_VQBuf() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | halTSP.c | 197 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00UL + ((addr)<<2UL)))) macro 5507 _u16TSP1RegArray[u32ii] = TSP_TSP1_REG(u32ii); in HAL_TSP_SaveRegs() 5594 TSP_TSP1_REG(0x06) |= (_u16TSP1RegArray[0x06] & ~0x800F); in HAL_TSP_RestoreRegs() 5595 TSP_TSP1_REG(0x07) |= (_u16TSP1RegArray[0x07] & ~0x0C00); in HAL_TSP_RestoreRegs() 5596 TSP_TSP1_REG(0x08) |= (_u16TSP1RegArray[0x08] & ~0x0200); in HAL_TSP_RestoreRegs() 5597 TSP_TSP1_REG(0x09) = _u16TSP1RegArray[0x09]; in HAL_TSP_RestoreRegs() 5598 TSP_TSP1_REG(0x0b) = _u16TSP1RegArray[0x0b]; in HAL_TSP_RestoreRegs() 5601 TSP_TSP1_REG(u32ii) = _u16TSP1RegArray[u32ii]; in HAL_TSP_RestoreRegs() 5603 TSP_TSP1_REG(0x1c) |= _u16TSP1RegArray[0x1c] & ~0x0040; in HAL_TSP_RestoreRegs() 5604 TSP_TSP1_REG(0x1e) = _u16TSP1RegArray[0x1e]; in HAL_TSP_RestoreRegs() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | halTSP.c | 198 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00UL + ((addr)<<2UL)))) macro 5859 _u16TSP1RegArray[u32ii] = TSP_TSP1_REG(u32ii); in HAL_TSP_SaveRegs() 5934 TSP_TSP1_REG(0x06) |= (_u16TSP1RegArray[0x06] & ~0x800F); in HAL_TSP_RestoreRegs() 5935 TSP_TSP1_REG(0x07) |= (_u16TSP1RegArray[0x07] & ~0x0C00); in HAL_TSP_RestoreRegs() 5936 TSP_TSP1_REG(0x08) |= (_u16TSP1RegArray[0x08] & ~0x0200); in HAL_TSP_RestoreRegs() 5937 TSP_TSP1_REG(0x09) = _u16TSP1RegArray[0x09]; in HAL_TSP_RestoreRegs() 5938 TSP_TSP1_REG(0x0b) = _u16TSP1RegArray[0x0b]; in HAL_TSP_RestoreRegs() 5941 TSP_TSP1_REG(u32ii) = _u16TSP1RegArray[u32ii]; in HAL_TSP_RestoreRegs() 5943 TSP_TSP1_REG(0x1c) |= _u16TSP1RegArray[0x1c] & ~0x0040; in HAL_TSP_RestoreRegs() 5944 TSP_TSP1_REG(0x1e) = _u16TSP1RegArray[0x1e]; in HAL_TSP_RestoreRegs() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | halTSP.c | 201 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00UL + ((addr)<<2UL)))) macro 6283 _u16TSP1RegArray[u32ii] = TSP_TSP1_REG(u32ii); in HAL_TSP_SaveRegs() 6370 TSP_TSP1_REG(0x06) |= (_u16TSP1RegArray[0x06] & ~0x800F); in HAL_TSP_RestoreRegs() 6371 TSP_TSP1_REG(0x07) |= (_u16TSP1RegArray[0x07] & ~0x0C00); in HAL_TSP_RestoreRegs() 6372 TSP_TSP1_REG(0x08) |= (_u16TSP1RegArray[0x08] & ~0x0200); in HAL_TSP_RestoreRegs() 6373 TSP_TSP1_REG(0x09) = _u16TSP1RegArray[0x09]; in HAL_TSP_RestoreRegs() 6374 TSP_TSP1_REG(0x0b) = _u16TSP1RegArray[0x0b]; in HAL_TSP_RestoreRegs() 6377 TSP_TSP1_REG(u32ii) = _u16TSP1RegArray[u32ii]; in HAL_TSP_RestoreRegs() 6379 TSP_TSP1_REG(0x1c) |= _u16TSP1RegArray[0x1c] & ~0x0040; in HAL_TSP_RestoreRegs() 6380 TSP_TSP1_REG(0x1e) = _u16TSP1RegArray[0x1e]; in HAL_TSP_RestoreRegs() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | halTSP.c | 201 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00UL + ((addr)<<2UL)))) macro 6266 _u16TSP1RegArray[u32ii] = TSP_TSP1_REG(u32ii); in HAL_TSP_SaveRegs() 6353 TSP_TSP1_REG(0x06) |= (_u16TSP1RegArray[0x06] & ~0x800F); in HAL_TSP_RestoreRegs() 6354 TSP_TSP1_REG(0x07) |= (_u16TSP1RegArray[0x07] & ~0x0C00); in HAL_TSP_RestoreRegs() 6355 TSP_TSP1_REG(0x08) |= (_u16TSP1RegArray[0x08] & ~0x0200); in HAL_TSP_RestoreRegs() 6356 TSP_TSP1_REG(0x09) = _u16TSP1RegArray[0x09]; in HAL_TSP_RestoreRegs() 6357 TSP_TSP1_REG(0x0b) = _u16TSP1RegArray[0x0b]; in HAL_TSP_RestoreRegs() 6360 TSP_TSP1_REG(u32ii) = _u16TSP1RegArray[u32ii]; in HAL_TSP_RestoreRegs() 6362 TSP_TSP1_REG(0x1c) |= _u16TSP1RegArray[0x1c] & ~0x0040; in HAL_TSP_RestoreRegs() 6363 TSP_TSP1_REG(0x1e) = _u16TSP1RegArray[0x1e]; in HAL_TSP_RestoreRegs() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | halTSP.c | 201 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00UL + ((addr)<<2UL)))) macro 6340 _u16TSP1RegArray[u32ii] = TSP_TSP1_REG(u32ii); in HAL_TSP_SaveRegs() 6427 TSP_TSP1_REG(0x06) |= (_u16TSP1RegArray[0x06] & ~0x800F); in HAL_TSP_RestoreRegs() 6428 TSP_TSP1_REG(0x07) |= (_u16TSP1RegArray[0x07] & ~0x0C00); in HAL_TSP_RestoreRegs() 6429 TSP_TSP1_REG(0x08) |= (_u16TSP1RegArray[0x08] & ~0x0200); in HAL_TSP_RestoreRegs() 6430 TSP_TSP1_REG(0x09) = _u16TSP1RegArray[0x09]; in HAL_TSP_RestoreRegs() 6431 TSP_TSP1_REG(0x0b) = _u16TSP1RegArray[0x0b]; in HAL_TSP_RestoreRegs() 6434 TSP_TSP1_REG(u32ii) = _u16TSP1RegArray[u32ii]; in HAL_TSP_RestoreRegs() 6436 TSP_TSP1_REG(0x1c) |= _u16TSP1RegArray[0x1c] & ~0x0040; in HAL_TSP_RestoreRegs() 6437 TSP_TSP1_REG(0x1e) = _u16TSP1RegArray[0x1e]; in HAL_TSP_RestoreRegs() [all …]
|
| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | halTSP.c | 201 #define TSP_TSP1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x2C00UL + ((addr)<<2UL)))) macro 6301 _u16TSP1RegArray[u32ii] = TSP_TSP1_REG(u32ii); in HAL_TSP_SaveRegs() 6388 TSP_TSP1_REG(0x06) |= (_u16TSP1RegArray[0x06] & ~0x800F); in HAL_TSP_RestoreRegs() 6389 TSP_TSP1_REG(0x07) |= (_u16TSP1RegArray[0x07] & ~0x0C00); in HAL_TSP_RestoreRegs() 6390 TSP_TSP1_REG(0x08) |= (_u16TSP1RegArray[0x08] & ~0x0200); in HAL_TSP_RestoreRegs() 6391 TSP_TSP1_REG(0x09) = _u16TSP1RegArray[0x09]; in HAL_TSP_RestoreRegs() 6392 TSP_TSP1_REG(0x0b) = _u16TSP1RegArray[0x0b]; in HAL_TSP_RestoreRegs() 6395 TSP_TSP1_REG(u32ii) = _u16TSP1RegArray[u32ii]; in HAL_TSP_RestoreRegs() 6397 TSP_TSP1_REG(0x1c) |= _u16TSP1RegArray[0x1c] & ~0x0040; in HAL_TSP_RestoreRegs() 6398 TSP_TSP1_REG(0x1e) = _u16TSP1RegArray[0x1e]; in HAL_TSP_RestoreRegs() [all …]
|