Searched refs:TSP_CLKGEN1_REG (Results 1 – 4 of 4) sorted by relevance
505 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC4_CLK) = (TSP_CLKGEN1_REG(REG_CLKGEN1_STC4_CLK) & ~REG_CLKGEN1_STC4… in HAL_TSP_Power()508 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC5_CLK) = (TSP_CLKGEN1_REG(REG_CLKGEN1_STC5_CLK) & ~REG_CLKGEN1_STC5… in HAL_TSP_Power()511 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC6_CLK) = (TSP_CLKGEN1_REG(REG_CLKGEN1_STC6_CLK) & ~REG_CLKGEN1_STC6… in HAL_TSP_Power()514 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC7_CLK) = (TSP_CLKGEN1_REG(REG_CLKGEN1_STC7_CLK) & ~REG_CLKGEN1_STC7… in HAL_TSP_Power()607 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC4_CLK) = _SET_(TSP_CLKGEN1_REG(REG_CLKGEN1_STC4_CLK),(REG_CLKGEN1… in HAL_TSP_Power()608 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC5_CLK) = _SET_(TSP_CLKGEN1_REG(REG_CLKGEN1_STC5_CLK),(REG_CLKGEN1… in HAL_TSP_Power()609 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC6_CLK) = _SET_(TSP_CLKGEN1_REG(REG_CLKGEN1_STC6_CLK),(REG_CLKGEN1… in HAL_TSP_Power()610 …TSP_CLKGEN1_REG(REG_CLKGEN1_STC7_CLK) = _SET_(TSP_CLKGEN1_REG(REG_CLKGEN1_STC7_CLK),(REG_CLKGEN1… in HAL_TSP_Power()2288 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) &= ~REG_CLKGEN1_STC4_CW_SEL; in HAL_TSP_STC_Init()2289 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYTNTH) &= ~REG_CLKGEN1_STC5_CW_SEL; in HAL_TSP_STC_Init()[all …]
176 #define TSP_CLKGEN1_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x6600 + ((addr)<<2)))) macro
267 #define TSP_CLKGEN1_REG(addr) (*((volatile MS_U16*)(_virtRegBase + 0x6600UL + ((addr)<<2UL)))) macro2089 …u32data = TSP_CLKGEN1_REG(REG_CLKGEN1_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN1_TSN_CL… in HAL_TSP_SelPad_ClkInv()2091 TSP_CLKGEN1_REG(REG_CLKGEN1_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()3175 …*pu16Clk = (TSP_CLKGEN1_REG(REG_CLKGEN1_TSN_CLKFI) >> REG_CLKGEN1_TSN_CLK_TSFI_SHIFT) & REG_CLKG… in HAL_TSP_GetTSIF_Status()3381 … return (TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC2_CW_L) | TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC2_CW_H)); in HAL_TSP_GetSTCSynth()3383 … return (TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC3_CW_L) | TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC3_CW_H)); in HAL_TSP_GetSTCSynth()3422 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYNTH) &= ~REG_CLKGEN1_STC2_CW_SEL; in HAL_TSP_SetSTCSynth()3423 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC2_CW_L) = (MS_U16)(u32Sync & 0xFFFF); in HAL_TSP_SetSTCSynth()3424 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC2_CW_H) = (MS_U16)((u32Sync >> 16UL) & 0xFFFF); in HAL_TSP_SetSTCSynth()3425 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_SYNTH) &= ~REG_CLKGEN1_STC2_CW_EN; in HAL_TSP_SetSTCSynth()[all …]
243 #define TSP_CLKGEN1_REG(addr) (*((volatile MS_U16*)(_u32RegBase + 0x6600 + ((addr)<<2)))) macro2050 …u32data = TSP_CLKGEN1_REG(REG_CLKGEN1_TSN_CLKFI) & ~(REG_CLKGEN0_TSN_CLK_MASK<< REG_CLKGEN1_TSN_CL… in HAL_TSP_SelPad_ClkInv()2052 TSP_CLKGEN1_REG(REG_CLKGEN1_TSN_CLKFI) = u32data; in HAL_TSP_SelPad_ClkInv()2939 …*pu16Clk = (TSP_CLKGEN1_REG(REG_CLKGEN1_TSN_CLKFI) >> REG_CLKGEN1_TSN_CLK_TSFI_SHIFT) & REG_CLKGEN… in HAL_TSP_GetTSIF_Status()