| /utopia/UTPA2-700.0.x/modules/wdt/drv/wdt/ |
| H A D | drvWDT.c | 699 HAL_WDT_WriteByte(TIMER_0_CTRL_REG,HAL_WDT_ReadByte(TIMER_0_CTRL_REG)&(~TIMER_ENABLE)); in MDrv_TIMER_Stop()
704 HAL_WDT_WriteByte(TIMER_1_CTRL_REG,HAL_WDT_ReadByte(TIMER_1_CTRL_REG)&(~TIMER_ENABLE)); in MDrv_TIMER_Stop()
726 HAL_WDT_WriteByte(TIMER_0_CTRL_REG,HAL_WDT_ReadByte(TIMER_0_CTRL_REG)|TIMER_ENABLE); in MDrv_TIMER_Count_U2K()
728 HAL_WDT_WriteByte(TIMER_0_CTRL_REG,HAL_WDT_ReadByte(TIMER_0_CTRL_REG)&(~TIMER_ENABLE)); in MDrv_TIMER_Count_U2K()
733 HAL_WDT_WriteByte(TIMER_1_CTRL_REG,HAL_WDT_ReadByte(TIMER_1_CTRL_REG)|TIMER_ENABLE); in MDrv_TIMER_Count_U2K()
735 HAL_WDT_WriteByte(TIMER_1_CTRL_REG,HAL_WDT_ReadByte(TIMER_1_CTRL_REG)&(~TIMER_ENABLE)); in MDrv_TIMER_Count_U2K()
840 HAL_WDT_WriteByte(TIMER_0_CTRL_REG,HAL_WDT_ReadByte(TIMER_0_CTRL_REG)|TIMER_ENABLE); in MDrv_TIMER_Rst_U2K()
842 HAL_WDT_WriteByte(TIMER_1_CTRL_REG,HAL_WDT_ReadByte(TIMER_1_CTRL_REG)|TIMER_ENABLE); in MDrv_TIMER_Rst_U2K()
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/kano/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/manhattan/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/M7821/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/maxim/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/mainz/wdt/ |
| H A D | regWDT.h | 116 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/maserati/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/curry/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/k6lite/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/messi/wdt/ |
| H A D | regWDT.h | 116 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/maldives/wdt/ |
| H A D | regWDT.h | 116 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/mustang/wdt/ |
| H A D | regWDT.h | 116 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/k6/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/mooney/wdt/ |
| H A D | regWDT.h | 116 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/M7621/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/macan/wdt/ |
| H A D | regWDT.h | 139 #define TIMER_ENABLE BIT(0) //(from 0 to max, then rolled) macro
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