xref: /utopia/UTPA2-700.0.x/modules/wdt/hal/mustang/wdt/regWDT.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)

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//<MStar Software>

#ifndef _REG_WDT_H_
#define _REG_WDT_H_

////////////////////////////////////////////////////////////////////////////////
//  Macro and Define
////////////////////////////////////////////////////////////////////////////////

#define REG_WDT_BASE        ( 0x3000 )
#define REG_TIMER0_BASE		( 0x3020 )
#define REG_TIMER1_BASE		( 0x3040 )

#define REG_WDT_SET(x)      ( REG_WDT_BASE + 2*x )
#define REG_TIMER0_SET(x)   ( REG_TIMER0_BASE + 2*x )
#define REG_TIMER1_SET(x)   ( REG_TIMER1_BASE + 2*x )


// WDT
#define REG_WDT_CLR         REG_WDT_SET(0x00)
#define REG_WDT_RST         REG_WDT_SET(0x02)
#define REG_WDT_INT         REG_WDT_SET(0x03)
#define REG_WDT_MAX         REG_WDT_SET(0x04)
#define REG_WDT_MAX2        REG_WDT_SET(0x05)

#define WDT_CLR_RESET_FLAG  BIT(0)
#define WDT_RST             BIT(0)

// Timer0
#define TIMER_0_CTRL_REG    REG_TIMER0_SET(0x00)
#define TIMER_0_MATCH_REG   REG_TIMER0_SET(0x01) //BIT0, RO
#define TIMER_0_MAX_REG		REG_TIMER0_SET(0x02) //BIT0-BIT31
#define TIMER_0_COUNT_REG   REG_TIMER0_SET(0x04) //BIT0-BIT31, RO
// Timer1
#define TIMER_1_CTRL_REG    REG_TIMER1_SET(0x00)
#define TIMER_1_MATCH_REG   REG_TIMER1_SET(0x01) //BIT0, RO
#define TIMER_1_MAX_REG		REG_TIMER1_SET(0x02) //BIT0-BIT31
#define TIMER_1_COUNT_REG   REG_TIMER1_SET(0x04) //BIT0-BIT31, RO

#define TIMER_ENABLE		BIT(0) //(from 0 to max, then rolled)
#define TIMER_TRIGGER		BIT(1) //(from 0 to max, then stop)
#define TIMER_DISABLE		BITS(1:0,0)
#define TIMER_INTEN          BIT(0) //BIT8
#define TIMER_MATCH         	BIT(0)
////////////////////////////////////////////////////////////////////////////////
//  Type and Structure
////////////////////////////////////////////////////////////////////////////////

#endif // _REG_WDT_H_