| /utopia/UTPA2-700.0.x/modules/wdt/drv/wdt/ |
| H A D | drvWDT.c | 945 return (HAL_WDT_Read4Byte(TIMER_1_COUNT_REG)); in MDrv_TIMER_GetCounter_U2K()
984 return (HAL_WDT_Read4Byte(TIMER_1_COUNT_REG)/MST_XTAL_CLOCK_HZ); in MDrv_TIMER_GetSecond_U2K()
1023 return (HAL_WDT_Read4Byte(TIMER_1_COUNT_REG)/MST_XTAL_CLOCK_KHZ); in MDrv_TIMER_GetMs_U2K()
1062 return (HAL_WDT_Read4Byte(TIMER_1_COUNT_REG)/MST_XTAL_CLOCK_MHZ); in MDrv_TIMER_GetUs_U2K()
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/kano/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/manhattan/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/M7821/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/maxim/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/mainz/wdt/ |
| H A D | regWDT.h | 114 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/maserati/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/curry/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/k6lite/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/messi/wdt/ |
| H A D | regWDT.h | 114 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/maldives/wdt/ |
| H A D | regWDT.h | 114 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/mustang/wdt/ |
| H A D | regWDT.h | 114 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/k6/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/mooney/wdt/ |
| H A D | regWDT.h | 114 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/M7621/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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| /utopia/UTPA2-700.0.x/modules/wdt/hal/macan/wdt/ |
| H A D | regWDT.h | 137 #define TIMER_1_COUNT_REG REG_TIMER1_SET(0x04UL) //BIT0-BIT31, RO macro
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