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Searched refs:SC_CLK_DC1 (Results 1 – 25 of 29) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_mux.c613 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC1); in Hal_SC_mux_dispatch()
623 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
634 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
641 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
656 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
664 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
672 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_mux.c608 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC1); in Hal_SC_mux_dispatch()
618 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
629 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
636 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
651 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
659 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
667 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_mux.c599 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC1); in Hal_SC_mux_dispatch()
609 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
620 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
627 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
642 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
650 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
658 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_mux.c599 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_HDR, SC_CLK_DC1); in Hal_SC_mux_dispatch()
609 MDrv_WriteByteMask(REG_CLK_HDR, SC_CLK_DC1 << 2, CKG_IDCLK2_MASK); in Hal_SC_mux_dispatch()
620 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
627 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
642 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
650 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
658 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_mux.c723 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
731 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
739 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_mux.c786 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
794 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
802 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_mux.c804 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
812 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
820 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_mux.c865 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
873 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
881 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_mux.c865 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
873 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
881 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_mux.c865 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
873 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
881 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_mux.c865 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
873 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
881 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_mux.c853 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
861 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
869 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_mux.c863 Hal_SC_mux_set_mainwin_ip_mux(pInstance, SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
871 Hal_SC_set_subwin_ip_mux(pInstance, SC_SUBWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
879 Hal_SC_mux_set_dipwin_ip_mux(pInstance, SC_DWIN_IPMUX_MVOP2 , SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_mux.c764 Hal_SC_mux_set_mainwin_ip_mux(pInstance,SC_MAINWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
771 Hal_SC_set_subwin_ip_mux(pInstance,SC_SUBWIN_IPMUX_MVOP2, SC_CLK_DC1); in Hal_SC_mux_dispatch()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_mux.h223 SC_CLK_DC1 = 7, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_mux.h226 SC_CLK_DC1 = 7, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_mux.h249 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_mux.h249 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_mux.h249 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_mux.h249 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_mux.h243 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_mux.h243 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_mux.h243 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_mux.h243 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_mux.h243 SC_CLK_DC1 = 8, ///< MPEG/DC1 enumerator

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