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Searched refs:REG_TOP_TS1_PE (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/sc/hal/manhattan/sc/
H A DhalSC.c225 HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad in HAL_SC_Init()
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/maldives/sc/
H A DhalSC.c227 HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad in HAL_SC_Init()
H A DregSC.h388 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x6UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/mainz/sc/
H A DhalSC.c228 HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad in HAL_SC_Init()
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/mustang/sc/
H A DhalSC.c227 HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad in HAL_SC_Init()
H A DregSC.h388 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x6UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/messi/sc/
H A DhalSC.c228 HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad in HAL_SC_Init()
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/macan/sc/
H A DhalSC.c225 HW_WRITE(REG_TOP_TS1_PE, HW_READ(REG_TOP_TS1_PE)|BIT(3)|BIT(6)); //for Edison new pad in HAL_SC_Init()
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DhalTSP.c321 #define REG_TOP_TS1_PE 0x06UL macro
2095 _u16TsPadPE[1] = TSP_TOP_REG(REG_TOP_TS1_PE) & REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
2096 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE) | REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
4797 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
4973 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DhalTSP.c321 #define REG_TOP_TS1_PE 0x06UL macro
2095 _u16TsPadPE[1] = TSP_TOP_REG(REG_TOP_TS1_PE) & REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
2096 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE) | REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
4780 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
4956 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DhalTSP.c329 #define REG_TOP_TS1_PE 0x06UL macro
2156 _u16TsPadPE[1] = TSP_TOP_REG(REG_TOP_TS1_PE) & REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
2157 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE) | REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
4863 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
5029 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DhalTSP.c329 #define REG_TOP_TS1_PE 0x06UL macro
2117 _u16TsPadPE[1] = TSP_TOP_REG(REG_TOP_TS1_PE) & REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
2118 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE) | REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
4824 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
4990 …TSP_TOP_REG(REG_TOP_TS1_PE) = (TSP_TOP_REG(REG_TOP_TS1_PE) & ~REG_TOP_TS1_PE_MASK) | _u16TsPadPE[1… in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DhalTSP.c206 #define REG_TOP_TS1_PE 0x06UL macro
1333 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE)| REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
2833 TSP_TOP_REG(REG_TOP_TS1_PE) &= ~REG_TOP_TS1_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DhalTSP.c206 #define REG_TOP_TS1_PE 0x06UL macro
1324 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE)| REG_TOP_TS_PE_MASK; in HAL_TSP_SelPad()
2844 TSP_TOP_REG(REG_TOP_TS1_PE) &= ~REG_TOP_TS_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DhalTSP.c207 #define REG_TOP_TS1_PE 0x06UL macro
1334 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE)| REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
2837 TSP_TOP_REG(REG_TOP_TS1_PE) &= ~REG_TOP_TS1_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/sc/hal/maserati/sc/
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/M7621/sc/
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/M7821/sc/
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/sc/hal/maxim/sc/
H A DregSC.h398 #define REG_TOP_TS1_PE (REG_CHIP_TOP_BASE + (0x00000006UL << 1)) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DhalTSP.c303 #define REG_TOP_TS1_PE 0x06UL macro
2036 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE) | REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
4320 TSP_TOP_REG(REG_TOP_TS1_PE) &= ~REG_TOP_TS1_PE_MASK; in HAL_TSP_PowerCtrl()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DhalTSP.c317 #define REG_TOP_TS1_PE 0x06UL macro
2058 TSP_TOP_REG(REG_TOP_TS1_PE) = TSP_TOP_REG(REG_TOP_TS1_PE) | REG_TOP_TS1_PE_MASK; in HAL_TSP_SelPad()
4357 TSP_TOP_REG(REG_TOP_TS1_PE) &= ~REG_TOP_TS1_PE_MASK; in HAL_TSP_PowerCtrl()