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Searched refs:REG_SECURE_TZPC_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h6709 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6710 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6711 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6712 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6713 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6714 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6715 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6716 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6717 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6718 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h606 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h6711 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6712 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6713 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6714 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6715 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6716 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6717 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6718 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6719 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6720 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h588 #define REG_SECURE_TZPC_BASE 0x172700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h6701 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6702 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6703 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6704 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6705 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6706 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6707 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6708 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6709 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6710 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h566 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h6711 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6712 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6713 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6714 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6715 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6716 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6717 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6718 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6719 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6720 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h590 #define REG_SECURE_TZPC_BASE 0x172700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h6701 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6702 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6703 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6704 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6705 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6706 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6707 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6708 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6709 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6710 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h593 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h6711 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6712 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6713 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6714 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6715 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6716 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6717 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6718 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6719 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6720 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h582 #define REG_SECURE_TZPC_BASE 0x172700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h6711 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6712 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6713 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6714 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6715 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6716 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6717 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6718 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6719 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6720 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h588 #define REG_SECURE_TZPC_BASE 0x172700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h6701 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6702 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6703 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6704 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6705 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6706 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6707 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6708 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6709 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6710 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h564 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h6702 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
6703 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
6704 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
6705 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
6706 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
6707 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
6708 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
6709 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
6710 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
6711 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h547 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h7475 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
7476 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
7477 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
7478 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
7479 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
7480 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
7481 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
7482 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
7483 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
7484 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h643 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h7483 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
7484 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
7485 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
7486 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
7487 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
7488 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
7489 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
7490 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
7491 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
7492 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h655 #define REG_SECURE_TZPC_BASE 0x173A00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h7483 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
7484 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
7485 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
7486 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
7487 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
7488 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
7489 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
7490 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
7491 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
7492 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h7483 #define REG_SECURE_TZPC_00_L (REG_SECURE_TZPC_BASE + 0x00)
7484 #define REG_SECURE_TZPC_00_H (REG_SECURE_TZPC_BASE + 0x01)
7485 #define REG_SECURE_TZPC_01_L (REG_SECURE_TZPC_BASE + 0x02)
7486 #define REG_SECURE_TZPC_01_H (REG_SECURE_TZPC_BASE + 0x03)
7487 #define REG_SECURE_TZPC_02_L (REG_SECURE_TZPC_BASE + 0x04)
7488 #define REG_SECURE_TZPC_02_H (REG_SECURE_TZPC_BASE + 0x05)
7489 #define REG_SECURE_TZPC_03_L (REG_SECURE_TZPC_BASE + 0x06)
7490 #define REG_SECURE_TZPC_03_H (REG_SECURE_TZPC_BASE + 0x07)
7491 #define REG_SECURE_TZPC_04_L (REG_SECURE_TZPC_BASE + 0x08)
7492 #define REG_SECURE_TZPC_04_H (REG_SECURE_TZPC_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h660 #define REG_SECURE_TZPC_BASE 0x173A00UL macro

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