Searched refs:REG_RVD_45_L (Results 1 – 6 of 6) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/pnl/ |
| H A D | halPNL.h | 223 #define REG_RVD_45_L (REG_RVD_BASE + 0x8A) macro
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| H A D | halPNL.c | 2626 …W2BYTEMSK(REG_RVD_45_L, 0, BIT(0)); //Demura Clock ga… in MHal_PNL_OverDriver_Enable()
2647 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_OverDriver_Enable()
3969 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_Init_MOD()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/pnl/ |
| H A D | halPNL.h | 223 #define REG_RVD_45_L (REG_RVD_BASE + 0x8A) macro
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| H A D | halPNL.c | 2630 …W2BYTEMSK(REG_RVD_45_L, 0, BIT(0)); //Demura Clock ga… in MHal_PNL_OverDriver_Enable()
2651 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_OverDriver_Enable()
3996 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_Init_MOD()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/pnl/ |
| H A D | halPNL.c | 1924 …W2BYTEMSK(REG_RVD_45_L, 0, BIT(0)); //Demura Clock ga… in MHal_PNL_OverDriver_Enable()
1946 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_OverDriver_Enable()
3066 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_Init_MOD()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/pnl/ |
| H A D | halPNL.c | 1924 …W2BYTEMSK(REG_RVD_45_L, 0, BIT(0)); //Demura Clock ga… in MHal_PNL_OverDriver_Enable()
1946 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_OverDriver_Enable()
3066 …W2BYTEMSK(REG_RVD_45_L, BIT(0), BIT(0)); //Demura Clo… in MHal_PNL_Init_MOD()
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