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Searched refs:REG_RASP_HW_CTRL1 (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/
H A DhalNDSRASP.c349 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Str2MIU_Reset()
350 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 | RASP_STR2MIU_RST_WADDR)); in HAL_NDSRASP_Str2MIU_Reset()
352 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & ~(RASP_STR2MIU_RST_WADDR)) ); in HAL_NDSRASP_Str2MIU_Reset()
391 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, 0x0); in HAL_NDSRASP_Init()
404 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, RASP_SERIAL_EXT_SYNC_1T); in HAL_NDSRASP_Init()
424 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Init()
461 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Pvr_Enable()
463 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, HWCtrl1); in HAL_NDSRASP_Pvr_Enable()
554 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng,REG_RASP_HW_CTRL1); in HAL_NDSRASP_Stop()
556 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & (~RASP_STR2MIU_EN)) ); in HAL_NDSRASP_Stop()
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H A DregNDSRASP.h206 #define REG_RASP_HW_CTRL1 0x0009 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DhalNDSRASP.c349 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Str2MIU_Reset()
350 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 | RASP_STR2MIU_RST_WADDR)); in HAL_NDSRASP_Str2MIU_Reset()
352 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & ~(RASP_STR2MIU_RST_WADDR)) ); in HAL_NDSRASP_Str2MIU_Reset()
391 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, 0x0); in HAL_NDSRASP_Init()
404 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, RASP_SERIAL_EXT_SYNC_1T); in HAL_NDSRASP_Init()
424 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Init()
461 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Pvr_Enable()
463 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, HWCtrl1); in HAL_NDSRASP_Pvr_Enable()
554 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng,REG_RASP_HW_CTRL1); in HAL_NDSRASP_Stop()
556 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & (~RASP_STR2MIU_EN)) ); in HAL_NDSRASP_Stop()
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H A DregNDSRASP.h206 #define REG_RASP_HW_CTRL1 0x0009 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DhalNDSRASP.c349 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Str2MIU_Reset()
350 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 | RASP_STR2MIU_RST_WADDR)); in HAL_NDSRASP_Str2MIU_Reset()
352 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & ~(RASP_STR2MIU_RST_WADDR)) ); in HAL_NDSRASP_Str2MIU_Reset()
391 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, 0x0); in HAL_NDSRASP_Init()
404 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, RASP_SERIAL_EXT_SYNC_1T); in HAL_NDSRASP_Init()
424 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Init()
461 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Pvr_Enable()
463 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, HWCtrl1); in HAL_NDSRASP_Pvr_Enable()
554 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng,REG_RASP_HW_CTRL1); in HAL_NDSRASP_Stop()
556 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & (~RASP_STR2MIU_EN)) ); in HAL_NDSRASP_Stop()
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H A DregNDSRASP.h206 #define REG_RASP_HW_CTRL1 0x0009 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DhalNDSRASP.c349 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Str2MIU_Reset()
350 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 | RASP_STR2MIU_RST_WADDR)); in HAL_NDSRASP_Str2MIU_Reset()
352 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & ~(RASP_STR2MIU_RST_WADDR)) ); in HAL_NDSRASP_Str2MIU_Reset()
391 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, 0x0); in HAL_NDSRASP_Init()
404 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, RASP_SERIAL_EXT_SYNC_1T); in HAL_NDSRASP_Init()
424 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Init()
461 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Pvr_Enable()
463 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, HWCtrl1); in HAL_NDSRASP_Pvr_Enable()
554 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng,REG_RASP_HW_CTRL1); in HAL_NDSRASP_Stop()
556 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & (~RASP_STR2MIU_EN)) ); in HAL_NDSRASP_Stop()
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H A DregNDSRASP.h206 #define REG_RASP_HW_CTRL1 0x0009 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DhalNDSRASP.c349 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Str2MIU_Reset()
350 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 | RASP_STR2MIU_RST_WADDR)); in HAL_NDSRASP_Str2MIU_Reset()
352 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & ~(RASP_STR2MIU_RST_WADDR)) ); in HAL_NDSRASP_Str2MIU_Reset()
391 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, 0x0); in HAL_NDSRASP_Init()
404 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, RASP_SERIAL_EXT_SYNC_1T); in HAL_NDSRASP_Init()
424 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Init()
461 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng, REG_RASP_HW_CTRL1); in HAL_NDSRASP_Pvr_Enable()
463 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, HWCtrl1); in HAL_NDSRASP_Pvr_Enable()
554 HWCtrl1 = HAL_RASP_ReadReg_Word(u32RASPEng,REG_RASP_HW_CTRL1); in HAL_NDSRASP_Stop()
556 HAL_RASP_WriteReg_Word(u32RASPEng, REG_RASP_HW_CTRL1, (HWCtrl1 & (~RASP_STR2MIU_EN)) ); in HAL_NDSRASP_Stop()
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H A DregNDSRASP.h206 #define REG_RASP_HW_CTRL1 0x0009 macro