Home
last modified time | relevance | path

Searched refs:REG_PM_SLEEP_BASE (Results 1 – 25 of 36) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h461 #define REG_PM_SLEEP_BASE REG_PM_SLP_BASE//0x0E00//alex_tung macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_pm_sleep.h102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
103 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
104 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
105 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
106 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
107 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
109 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
110 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
111 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h383 #define REG_PM_SLEEP_BASE REG_PM_SLP_BASE//0x0E00//alex_tung macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_pm_sleep.h102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
103 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
104 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
105 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
106 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
107 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
109 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
110 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
111 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h383 #define REG_PM_SLEEP_BASE REG_PM_SLP_BASE//0x0E00//alex_tung macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h463 #define REG_PM_SLEEP_BASE REG_PM_SLP_BASE//0x0E00//alex_tung macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
103 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
104 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
105 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
106 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
107 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
109 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
110 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
111 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h481 #define REG_PM_SLEEP_BASE REG_PM_SLP_BASE//0x0E00//alex_tung macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
103 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
104 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
105 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
106 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
107 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
109 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
110 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
111 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
103 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
104 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
105 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
106 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
107 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
109 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
110 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
111 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_pm_sleep.h102 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
103 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
104 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
105 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
106 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
107 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
108 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
109 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
110 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
111 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_pm_sleep.h101 #define REG_PM_SLEEP_00_L (REG_PM_SLEEP_BASE + 0x00)
102 #define REG_PM_SLEEP_00_H (REG_PM_SLEEP_BASE + 0x01)
103 #define REG_PM_SLEEP_01_L (REG_PM_SLEEP_BASE + 0x02)
104 #define REG_PM_SLEEP_01_H (REG_PM_SLEEP_BASE + 0x03)
105 #define REG_PM_SLEEP_02_L (REG_PM_SLEEP_BASE + 0x04)
106 #define REG_PM_SLEEP_02_H (REG_PM_SLEEP_BASE + 0x05)
107 #define REG_PM_SLEEP_03_L (REG_PM_SLEEP_BASE + 0x06)
108 #define REG_PM_SLEEP_03_H (REG_PM_SLEEP_BASE + 0x07)
109 #define REG_PM_SLEEP_04_L (REG_PM_SLEEP_BASE + 0x08)
110 #define REG_PM_SLEEP_04_H (REG_PM_SLEEP_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/ca2/
H A DregCA.h254 #define REG_PM_SLEEP_BASE (0x00E00UL * 2)//000E macro
255 #define REG_TOP_SW_RST (REG_PM_SLEEP_BASE + 0x2E*4)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/ca2/
H A DregCA.h254 #define REG_PM_SLEEP_BASE (0x00E00UL * 2)//000E macro
255 #define REG_TOP_SW_RST (REG_PM_SLEEP_BASE + 0x2E*4)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/ca2/
H A DregCA.h254 #define REG_PM_SLEEP_BASE (0x00E00UL * 2)//000E macro
255 #define REG_TOP_SW_RST (REG_PM_SLEEP_BASE + 0x2E*4)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/ca2/
H A DregCA.h254 #define REG_PM_SLEEP_BASE (0x00E00UL * 2)//000E macro
255 #define REG_TOP_SW_RST (REG_PM_SLEEP_BASE + 0x2E*4)
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/ca2/
H A DregCA.h254 #define REG_PM_SLEEP_BASE (0x00E00UL * 2)//000E macro
255 #define REG_TOP_SW_RST (REG_PM_SLEEP_BASE + 0x2E*4)

12