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Searched refs:REG_PM_SLEEP_73_L (Results 1 – 24 of 24) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c770 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(0) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
775 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(1): 0, BIT(1)); in Hal_HDMI_pullhpd()
782 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(8) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
787 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(9): 0, BIT(9)); in Hal_HDMI_pullhpd()
800 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(1): 0, BIT(1)); in Hal_HDMI_pullhpd()
805 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(9): 0, BIT(9)); in Hal_HDMI_pullhpd()
825 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(0) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
830 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(1): 0, BIT(1)); in Hal_HDMI_pullhpd()
837 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(8) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
842 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(9): 0, BIT(9)); in Hal_HDMI_pullhpd()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c770 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(0) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
775 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(1): 0, BIT(1)); in Hal_HDMI_pullhpd()
782 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(8) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
787 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(9): 0, BIT(9)); in Hal_HDMI_pullhpd()
800 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(1): 0, BIT(1)); in Hal_HDMI_pullhpd()
805 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(9): 0, BIT(9)); in Hal_HDMI_pullhpd()
825 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(0) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
830 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(1): 0, BIT(1)); in Hal_HDMI_pullhpd()
837 PM_W2BYTE(REG_PM_SLEEP_73_L, BIT(8) , BIT(8)|BIT(0) ); in Hal_HDMI_pullhpd()
842 PM_W2BYTE(REG_PM_SLEEP_73_L, bHighLow? BIT(9): 0, BIT(9)); in Hal_HDMI_pullhpd()
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhalMHL.c1246 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(0), BIT(6)| BIT(8)| BIT(0)); // [0]: reg_hplugc_mhl_en in _mhal_mhl_CbusAndClockSelect()
1251 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(8), BIT(14)| BIT(8)| BIT(0)); // [8]: reg_hpluga_mhl_en in _mhal_mhl_CbusAndClockSelect()
3163 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(0), BIT(0)); // [0]: reg_hplugc_mhl_en in mhal_mhl_SetHPD()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhalMHL.c1246 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(0), BIT(6)| BIT(8)| BIT(0)); // [0]: reg_hplugc_mhl_en in _mhal_mhl_CbusAndClockSelect()
1251 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(8), BIT(14)| BIT(8)| BIT(0)); // [8]: reg_hpluga_mhl_en in _mhal_mhl_CbusAndClockSelect()
3160 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(0), BIT(0)); // [0]: reg_hplugc_mhl_en in mhal_mhl_SetHPD()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_pm_sleep.h332 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_pm_sleep.h332 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h332 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h332 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h332 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_pm_sleep.h332 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_pm_sleep.h331 #define REG_PM_SLEEP_73_L (REG_PM_SLEEP_BASE + 0xE6) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c1203 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(0), BIT(6)| BIT(8)| BIT(0)); // [0]: reg_hplugc_mhl_en in _mhal_mhl_CbusAndClockSelect()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c4343 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(1) , BIT(1)| BIT(6)); // reg_hplugc_pu1k in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c4349 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(1) , BIT(1)| BIT(6)); // reg_hplugc_pu1k in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c4343 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(1) , BIT(1)| BIT(6)); // reg_hplugc_pu1k in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c4349 W2BYTEMSK(REG_PM_SLEEP_73_L, BIT(1) , BIT(1)| BIT(6)); // reg_hplugc_pu1k in Hal_HDMI_init()