| /utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/ |
| H A D | hwregMHL.h | 109 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
248 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
249 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
250 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
251 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
252 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
253 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
254 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
255 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
256 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_pm_sleep.h | 659 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
660 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
661 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
662 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
663 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
664 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
665 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
666 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
667 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
668 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_pm_sleep.h | 657 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
658 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
659 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
660 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
661 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
662 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
663 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
664 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
665 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
666 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_pm_sleep.h | 658 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
659 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
660 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
661 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
662 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
663 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
664 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
665 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
666 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
667 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_pm_sleep.h | 659 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
660 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
661 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
662 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
663 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
664 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
665 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
666 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
667 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
668 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_pm_sleep.h | 659 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
660 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
661 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
662 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
663 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
664 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
665 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
666 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
667 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
668 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_pm_sleep.h | 660 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
661 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
662 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
663 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
664 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
665 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
666 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
667 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
668 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
669 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_pm_sleep.h | 660 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
661 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
662 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
663 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
664 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
665 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
666 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
667 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
668 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
669 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_pm_sleep.h | 659 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
660 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
661 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
662 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
663 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
664 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
665 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
666 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
667 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
668 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_pm_sleep.h | 658 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
659 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
660 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
661 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
662 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
663 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
664 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
665 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
666 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
667 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_pm_sleep.h | 659 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
660 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
661 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
662 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
663 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
664 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
665 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
666 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
667 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
668 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_pm_sleep.h | 659 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
660 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
661 #define REG_PM_MHL_CBUS_02 (REG_PM_MHL_CBUS_BANK + 0x04)
662 #define REG_PM_MHL_CBUS_03 (REG_PM_MHL_CBUS_BANK + 0x06)
663 #define REG_PM_MHL_CBUS_04 (REG_PM_MHL_CBUS_BANK + 0x08)
664 #define REG_PM_MHL_CBUS_05 (REG_PM_MHL_CBUS_BANK + 0x0A)
665 #define REG_PM_MHL_CBUS_06 (REG_PM_MHL_CBUS_BANK + 0x0C)
666 #define REG_PM_MHL_CBUS_07 (REG_PM_MHL_CBUS_BANK + 0x0E)
667 #define REG_PM_MHL_CBUS_08 (REG_PM_MHL_CBUS_BANK + 0x10)
668 #define REG_PM_MHL_CBUS_09 (REG_PM_MHL_CBUS_BANK + 0x12)
[all …]
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/ |
| H A D | hwregMHL.h | 111 #define REG_PM_MHL_CBUS_BANK 0x002F00 macro
161 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
162 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
163 #define REG_PM_MHL_CBUS_0C (REG_PM_MHL_CBUS_BANK + 0x18)
164 #define REG_PM_MHL_CBUS_0D (REG_PM_MHL_CBUS_BANK + 0x1A)
165 #define REG_PM_MHL_CBUS_16 (REG_PM_MHL_CBUS_BANK + 0x2C)
166 #define REG_PM_MHL_CBUS_17 (REG_PM_MHL_CBUS_BANK + 0x2E)
167 #define REG_PM_MHL_CBUS_18 (REG_PM_MHL_CBUS_BANK + 0x30)
168 #define REG_PM_MHL_CBUS_20 (REG_PM_MHL_CBUS_BANK + 0x40)
169 #define REG_PM_MHL_CBUS_21 (REG_PM_MHL_CBUS_BANK + 0x42)
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/ |
| H A D | hwregMHL.h | 111 #define REG_PM_MHL_CBUS_BANK 0x002F00 macro
161 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
162 #define REG_PM_MHL_CBUS_01 (REG_PM_MHL_CBUS_BANK + 0x02)
163 #define REG_PM_MHL_CBUS_0C (REG_PM_MHL_CBUS_BANK + 0x18)
164 #define REG_PM_MHL_CBUS_0D (REG_PM_MHL_CBUS_BANK + 0x1A)
165 #define REG_PM_MHL_CBUS_16 (REG_PM_MHL_CBUS_BANK + 0x2C)
166 #define REG_PM_MHL_CBUS_17 (REG_PM_MHL_CBUS_BANK + 0x2E)
167 #define REG_PM_MHL_CBUS_18 (REG_PM_MHL_CBUS_BANK + 0x30)
168 #define REG_PM_MHL_CBUS_20 (REG_PM_MHL_CBUS_BANK + 0x40)
169 #define REG_PM_MHL_CBUS_21 (REG_PM_MHL_CBUS_BANK + 0x42)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_mhl.h | 93 #define REG_PM_MHL_CBUS_BANK 0x002F00 macro
134 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
135 #define REG_PM_MHL_CBUS_0C (REG_PM_MHL_CBUS_BANK + 0x18)
136 #define REG_PM_MHL_CBUS_0D (REG_PM_MHL_CBUS_BANK + 0x1A)
137 #define REG_PM_MHL_CBUS_16 (REG_PM_MHL_CBUS_BANK + 0x2C)
138 #define REG_PM_MHL_CBUS_17 (REG_PM_MHL_CBUS_BANK + 0x2E)
139 #define REG_PM_MHL_CBUS_18 (REG_PM_MHL_CBUS_BANK + 0x30)
140 #define REG_PM_MHL_CBUS_20 (REG_PM_MHL_CBUS_BANK + 0x40)
141 #define REG_PM_MHL_CBUS_21 (REG_PM_MHL_CBUS_BANK + 0x42)
142 #define REG_PM_MHL_CBUS_30 (REG_PM_MHL_CBUS_BANK + 0x60)
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_mhl.h | 93 #define REG_PM_MHL_CBUS_BANK 0x002F00 macro
134 #define REG_PM_MHL_CBUS_00 (REG_PM_MHL_CBUS_BANK + 0x00)
135 #define REG_PM_MHL_CBUS_0C (REG_PM_MHL_CBUS_BANK + 0x18)
136 #define REG_PM_MHL_CBUS_0D (REG_PM_MHL_CBUS_BANK + 0x1A)
137 #define REG_PM_MHL_CBUS_16 (REG_PM_MHL_CBUS_BANK + 0x2C)
138 #define REG_PM_MHL_CBUS_17 (REG_PM_MHL_CBUS_BANK + 0x2E)
139 #define REG_PM_MHL_CBUS_18 (REG_PM_MHL_CBUS_BANK + 0x30)
140 #define REG_PM_MHL_CBUS_20 (REG_PM_MHL_CBUS_BANK + 0x40)
141 #define REG_PM_MHL_CBUS_21 (REG_PM_MHL_CBUS_BANK + 0x42)
142 #define REG_PM_MHL_CBUS_30 (REG_PM_MHL_CBUS_BANK + 0x60)
[all …]
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | mhal_xc_chip_config.h | 473 #define REG_PM_MHL_CBUS_BANK 0x002F00UL macro
|