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Searched refs:REG_PAD_SAR_BASE (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h519 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
520 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
521 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
522 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h538 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h517 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
518 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
519 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
520 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h502 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h518 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
519 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
520 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
521 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h482 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h519 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
520 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
521 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
522 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h446 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h519 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
520 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
521 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
522 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h534 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h520 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
521 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
522 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
523 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h490 #define REG_PAD_SAR_BASE 0x001400UL macro
H A Dmhal_xc_chip_config.h.0489 #define REG_PAD_SAR_BASE 0x001400UL
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h520 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
521 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
522 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
523 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h488 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h519 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
520 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
521 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
522 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h489 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_pm_sleep.h518 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
519 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
520 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
521 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h488 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_pm_sleep.h519 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
520 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
521 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
522 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h552 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_pm_sleep.h519 #define REG_PAD_SAR_11_L (REG_PAD_SAR_BASE + 0x22)
520 #define REG_PAD_SAR_11_H (REG_PAD_SAR_BASE + 0x23)
521 #define REG_PAD_SAR_12_L (REG_PAD_SAR_BASE + 0x24)
522 #define REG_PAD_SAR_12_H (REG_PAD_SAR_BASE + 0x25)
H A Dmhal_xc_chip_config.h547 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h464 #define REG_PAD_SAR_BASE 0x001400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h462 #define REG_PAD_SAR_BASE 0x001400UL macro