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Searched refs:REG_NI_NSK2_CTRL (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DhalNSK2.c884 NI_REG(REG_NI_NSK2_CTRL) &= (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_Exit()
913 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
915 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
922 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
926 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
945 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
951 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
2339 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2342 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2345 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
[all …]
H A DregNSK2.h184 #define REG_NI_NSK2_CTRL 0x0 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DhalNSK2.c899 NI_REG(REG_NI_NSK2_CTRL) &= (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_Exit()
928 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
930 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
937 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
941 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
960 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
966 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
2360 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2364 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2367 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
[all …]
H A DregNSK2.h185 #define REG_NI_NSK2_CTRL 0x0 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/curry/nsk2/
H A DhalNSK2.c849 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_Init()
857 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_Init()
860 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_Init()
900 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
902 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
909 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
913 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
932 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
938 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
2399 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
[all …]
H A DregNSK2.h183 #define REG_NI_NSK2_CTRL 0x0 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DhalNSK2.c899 NI_REG(REG_NI_NSK2_CTRL) &= (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_Exit()
928 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
930 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
937 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
941 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
960 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
966 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
2357 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2361 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2364 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
[all …]
H A DregNSK2.h185 #define REG_NI_NSK2_CTRL 0x0 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DhalNSK2.c899 NI_REG(REG_NI_NSK2_CTRL) &= (~NI_NSK2_RESET_DISABLE); in HAL_NSK2_Exit()
928 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
930 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_ColdReset()
937 …NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_TS2NSK_ENABLE | NI_NSK2_CLK_ENABLE | NI_NSK2_RESET_DISABLE; in HAL_NSK2_ColdReset()
941 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ColdReset()
960 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_EndSubtest()
966 NI_REG(REG_NI_NSK2_CTRL) = (u32Data & (~NI_NSK2_RESET_DISABLE)); in HAL_NSK2_EndSubtest()
2362 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
2366 NI_REG(REG_NI_NSK2_CTRL) = u32Data | NI_NSK2_RESET_DISABLE | NI_NSK2_CLK_ENABLE; in HAL_NSK2_ClockTest()
2369 u32Data = NI_REG(REG_NI_NSK2_CTRL); in HAL_NSK2_ClockTest()
[all …]
H A DregNSK2.h185 #define REG_NI_NSK2_CTRL 0x0 macro