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Searched refs:REG_MIU_SEL_PVR4_MASK (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h2263 #define REG_MIU_SEL_PVR4_MASK 0x00C0 macro
H A DhalTSP.c4963 …rl6->CFG6_2E_REG_MIU_PVR_FQ) & (~REG_MIU_SEL_PVR4_MASK)) | ((u8MiuSel << REG_MIU_SEL_PVR4_SHIFT) &… in HAL_PVR_SetBuf()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h2444 #define REG_MIU_SEL_PVR4_MASK 0x00C0 macro
H A DhalTSP.c5473 …rl6->CFG6_2E_REG_MIU_PVR_FQ) & (~REG_MIU_SEL_PVR4_MASK)) | ((u8MiuSel << REG_MIU_SEL_PVR4_SHIFT) &… in HAL_PVR_SetBuf()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h2366 #define REG_MIU_SEL_PVR4_MASK 0x00C0 macro
H A DhalTSP.c5136 …rl6->CFG6_2E_REG_MIU_PVR_FQ) & (~REG_MIU_SEL_PVR4_MASK)) | ((u8MiuSel << REG_MIU_SEL_PVR4_SHIFT) &… in HAL_PVR_SetBuf()