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Searched refs:REG_MIU1_EX_BASE (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h498 #define REG_MIU1_EX_BASE 0x162200 macro
956 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
957 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h504 #define REG_MIU1_EX_BASE 0x162200 macro
962 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
963 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_xc_chip_config.h504 #define REG_MIU1_EX_BASE 0x162200 macro
972 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
973 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_xc_chip_config.h506 #define REG_MIU1_EX_BASE 0x162200 macro
966 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
967 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
H A Dmhal_xc_chip_config.h.0505 #define REG_MIU1_EX_BASE 0x162200
965 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
966 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h460 #define REG_MIU1_EX_BASE 0x162200UL macro
986 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
987 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h549 #define REG_MIU1_EX_BASE 0x162200UL macro
1102 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
1103 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h517 #define REG_MIU1_EX_BASE 0x162200UL macro
1057 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
1058 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h562 #define REG_MIU1_EX_BASE 0x162200UL macro
1114 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
1115 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h504 #define REG_MIU1_EX_BASE 0x162200UL macro
1051 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
1052 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h567 #define REG_MIU1_EX_BASE 0x162200UL macro
1119 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
1120 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h553 #define REG_MIU1_EX_BASE 0x162200UL macro
1106 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
1107 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h479 #define REG_MIU1_EX_BASE 0x162200UL macro
939 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h477 #define REG_MIU1_EX_BASE 0x162200UL macro
921 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)