Searched refs:REG_MIU1_EX_BASE (Results 1 – 14 of 14) sorted by relevance
498 #define REG_MIU1_EX_BASE 0x162200 macro956 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)957 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
504 #define REG_MIU1_EX_BASE 0x162200 macro962 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)963 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
504 #define REG_MIU1_EX_BASE 0x162200 macro972 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)973 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
506 #define REG_MIU1_EX_BASE 0x162200 macro966 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)967 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
505 #define REG_MIU1_EX_BASE 0x162200965 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)966 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
460 #define REG_MIU1_EX_BASE 0x162200UL macro986 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)987 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
549 #define REG_MIU1_EX_BASE 0x162200UL macro1102 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)1103 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
517 #define REG_MIU1_EX_BASE 0x162200UL macro1057 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)1058 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
562 #define REG_MIU1_EX_BASE 0x162200UL macro1114 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)1115 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
504 #define REG_MIU1_EX_BASE 0x162200UL macro1051 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)1052 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
567 #define REG_MIU1_EX_BASE 0x162200UL macro1119 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)1120 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
553 #define REG_MIU1_EX_BASE 0x162200UL macro1106 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)1107 #define MIU1_G5_REQUEST_MASK (REG_MIU1_EX_BASE + 0x26)
479 #define REG_MIU1_EX_BASE 0x162200UL macro939 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)
477 #define REG_MIU1_EX_BASE 0x162200UL macro921 #define MIU1_G4_REQUEST_MASK (REG_MIU1_EX_BASE + 0x06)