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Searched refs:REG_MIPS_IRQ_FINAL_STATUS (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/
H A DregIRQ.h179 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x3C*2) //[IRQ][HAL][008] Status bit… macro
248 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
274 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
298 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
321 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
345 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
368 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/
H A DregIRQ.h179 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x3C*2) macro
248 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
274 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
298 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
321 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
345 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
368 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/
H A DregIRQ.h179 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x3C*2) macro
248 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
274 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
298 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
321 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
345 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/
H A DregIRQ.h179 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x3C*2) macro
248 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
274 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
298 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
321 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
345 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/
H A DregIRQ.h179 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x3C*2) macro
248 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
274 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
298 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
321 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
345 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/
H A DregIRQ.h179 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x3C*2) //[IRQ][HAL][008] Status bit… macro
248 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
274 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
298 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
321 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
345 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/mustang/irq/
H A DregIRQ.h141 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x5C*2) macro
173 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
191 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
207 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
223 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/maldives/irq/
H A DregIRQ.h141 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + 0x5C*2) macro
173 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
191 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
207 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
223 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/mainz/irq/
H A DregIRQ.h131 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x003C << 1)) macro
163 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/mooney/irq/
H A DregIRQ.h131 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x003C << 1)) macro
163 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/messi/irq/
H A DregIRQ.h131 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x003C << 1)) macro
163 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/
H A DregIRQ.h139 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x5c << 1)) macro
182 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/
H A DregIRQ.h139 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x5c << 1)) macro
182 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/
H A DregIRQ.h139 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x5c << 1)) macro
182 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/
H A DregIRQ.h139 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x5c << 1)) macro
182 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS
/utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/
H A DregIRQ.h139 #define REG_MIPS_IRQ_FINAL_STATUS (RIUBASE_IRQ + (0x5c << 1)) macro
182 #define REG_IRQ_FINAL_STATUS REG_MIPS_IRQ_FINAL_STATUS