| /utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/ |
| H A D | regIRQ.h | 174 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x24*2) //[IRQ][HAL][001] Mask bit o… macro 243 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 269 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 293 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 316 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 340 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 363 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/ |
| H A D | regIRQ.h | 174 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x24*2) macro 243 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 269 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 293 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 316 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 340 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 363 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/ |
| H A D | regIRQ.h | 174 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x24*2) macro 243 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 269 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 293 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 316 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 340 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/ |
| H A D | regIRQ.h | 174 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x24*2) macro 243 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 269 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 293 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 316 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 340 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/ |
| H A D | regIRQ.h | 174 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x24*2) macro 243 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 269 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 293 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 316 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 340 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/ |
| H A D | regIRQ.h | 174 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x24*2) //[IRQ][HAL][001] Mask bit o… macro 243 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 269 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 293 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 316 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 340 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mustang/irq/ |
| H A D | regIRQ.h | 136 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x44*2) macro 168 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 186 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 202 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 218 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/maldives/irq/ |
| H A D | regIRQ.h | 136 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + 0x44*2) macro 168 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 186 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 202 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK 218 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mainz/irq/ |
| H A D | regIRQ.h | 126 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x0024 << 1)) macro 158 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/mooney/irq/ |
| H A D | regIRQ.h | 126 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x0024 << 1)) macro 158 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/messi/irq/ |
| H A D | regIRQ.h | 126 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x0024 << 1)) macro 158 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/ |
| H A D | regIRQ.h | 134 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x44 << 1)) macro 177 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/ |
| H A D | regIRQ.h | 134 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x44 << 1)) macro 177 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/ |
| H A D | regIRQ.h | 134 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x44 << 1)) macro 177 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/ |
| H A D | regIRQ.h | 134 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x44 << 1)) macro 177 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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| /utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/ |
| H A D | regIRQ.h | 134 #define REG_MIPS_C_FIQ_MASK (RIUBASE_IRQ + (0x44 << 1)) macro 177 #define REG_C_FIQ_MASK REG_MIPS_C_FIQ_MASK
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