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Searched refs:REG_MIPS_C_FIQ_EXP_CLR (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/irq/hal/M7821/irq/
H A DregIRQ.h182 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x2E*2) //[IRQ][HAL][005] Clear … macro
251 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
277 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
301 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
324 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
348 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
371 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/macan/irq/
H A DregIRQ.h182 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x2E*2) macro
251 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
277 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
301 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
324 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
348 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
371 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/maserati/irq/
H A DregIRQ.h182 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x2E*2) macro
251 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
277 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
301 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
324 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
348 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/manhattan/irq/
H A DregIRQ.h182 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x2E*2) macro
251 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
277 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
301 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
324 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
348 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/maxim/irq/
H A DregIRQ.h182 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x2E*2) macro
251 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
277 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
301 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
324 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
348 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/M7621/irq/
H A DregIRQ.h182 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x2E*2) //[IRQ][HAL][005] Clear … macro
251 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
277 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
301 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
324 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
348 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/mustang/irq/
H A DregIRQ.h144 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x4E*2) macro
176 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
194 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
210 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
226 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/maldives/irq/
H A DregIRQ.h144 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + 0x4E*2) macro
176 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
194 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
210 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
226 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/mainz/irq/
H A DregIRQ.h134 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x002E << 1)) macro
166 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/mooney/irq/
H A DregIRQ.h134 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x002E << 1)) macro
166 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/messi/irq/
H A DregIRQ.h134 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x002E << 1)) macro
166 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/kano/irq/
H A DregIRQ.h142 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x4e << 1)) macro
185 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/k7u/irq/
H A DregIRQ.h142 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x4e << 1)) macro
185 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/k6lite/irq/
H A DregIRQ.h142 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x4e << 1)) macro
185 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/curry/irq/
H A DregIRQ.h142 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x4e << 1)) macro
185 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR
/utopia/UTPA2-700.0.x/modules/irq/hal/k6/irq/
H A DregIRQ.h142 #define REG_MIPS_C_FIQ_EXP_CLR (RIUBASE_IRQ_EXP + (0x4e << 1)) macro
185 #define REG_C_FIQ_EXP_CLR REG_MIPS_C_FIQ_EXP_CLR