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Searched refs:REG_INV_3D_FLAG (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/pwm/hal/macan/pwm/
H A DhalPWM.c1366 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1377 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1381 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1385 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1389 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1402 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1406 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1410 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1414 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h321 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/M7621/pwm/
H A DhalPWM.c1683 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1694 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1698 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1702 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1706 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1719 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1723 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1727 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1731 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h330 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/maserati/pwm/
H A DhalPWM.c1684 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1695 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1699 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1703 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1707 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1720 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1724 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1728 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1732 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h330 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/M7821/pwm/
H A DhalPWM.c1684 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1695 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1699 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1703 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1707 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1720 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1724 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1728 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1732 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h330 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/messi/pwm/
H A DhalPWM.c1691 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1702 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1706 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1710 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1714 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1727 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1731 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1735 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1739 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h321 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/mooney/pwm/
H A DhalPWM.c1683 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1694 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1698 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1702 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1706 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1719 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1723 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1727 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1731 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h321 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/mainz/pwm/
H A DhalPWM.c1686 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1697 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1701 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1705 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1709 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1722 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1726 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1730 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1734 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h321 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/maxim/pwm/
H A DhalPWM.c1683 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1694 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1698 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1702 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1706 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1719 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1723 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1727 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1731 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h330 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/manhattan/pwm/
H A DhalPWM.c1683 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
1694 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(0:0, bMask), BMASK(0:0)); in HAL_PWM_LR_RST_RISING()
1698 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(1:1, bMask), BMASK(1:1)); in HAL_PWM_LR_RST_RISING()
1702 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(2:2, bMask), BMASK(2:2)); in HAL_PWM_LR_RST_RISING()
1706 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(3:3, bMask), BMASK(3:3)); in HAL_PWM_LR_RST_RISING()
1719 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(8:8, bMask), BMASK(8:8)); in HAL_PWM_LR_RST_FALLING()
1723 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(9:9, bMask), BMASK(9:9)); in HAL_PWM_LR_RST_FALLING()
1727 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(10:10, bMask), BMASK(10:10)); in HAL_PWM_LR_RST_FALLING()
1731 HAL_PWM_WriteRegBit(REG_INV_3D_FLAG, BITS(11:11, bMask), BMASK(11:11)); in HAL_PWM_LR_RST_FALLING()
H A DregPWM.h321 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/mustang/pwm/
H A DregPWM.h313 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
H A DhalPWM.c1376 HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15)); in HAL_PWM_INV_3D_Flag()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maldives/pwm/
H A DregPWM.h309 #define REG_INV_3D_FLAG (0x78) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/kano/pwm/
H A DregPWM.h298 #define REG_INV_3D_FLAG (REG_PWM_BASE + 0x78*2+1) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/k6/pwm/
H A DregPWM.h298 #define REG_INV_3D_FLAG (REG_PWM_BASE + 0x78*2+1) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/k6lite/pwm/
H A DregPWM.h298 #define REG_INV_3D_FLAG (REG_PWM_BASE + 0x78*2+1) //bit15, inverse 3D flag macro
/utopia/UTPA2-700.0.x/modules/pwm/hal/curry/pwm/
H A DregPWM.h298 #define REG_INV_3D_FLAG (REG_PWM_BASE + 0x78*2+1) //bit15, inverse 3D flag macro

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