Searched refs:REG_HSYNC_VSYNC_EN (Results 1 – 8 of 8) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/ |
| H A D | halDAC.c | 1610 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x03, 1:0); //Enable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
1616 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x00, 1:0); //Disable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
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| /utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/ |
| H A D | hwreg_dac.h | 144 #define REG_HSYNC_VSYNC_EN (0x47) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/ |
| H A D | hwreg_dac.h | 144 #define REG_HSYNC_VSYNC_EN (0x47) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/ |
| H A D | hwreg_dac.h | 144 #define REG_HSYNC_VSYNC_EN (0x47) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/ |
| H A D | hwreg_dac.h | 144 #define REG_HSYNC_VSYNC_EN (0x47) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/ |
| H A D | halDAC.c | 2224 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x03, 1:0); //Enable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
2230 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x00, 1:0); //Disable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/ |
| H A D | halDAC.c | 2245 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x03, 1:0); //Enable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
2249 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x00, 1:0); //Disable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/ |
| H A D | halDAC.c | 2236 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x03, 1:0); //Enable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
2242 W1BYTE(L_BK_CHIPTOP_TOP(REG_HSYNC_VSYNC_EN), 0x00, 1:0); //Disable Hsync Vsync in Hal_DAC_SetVGAHsyncVsync()
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