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Searched refs:REG_DVI_PS2_BASE (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h939 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
940 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
941 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
942 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
943 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
944 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h430 #define REG_DVI_PS2_BASE 0x113680 // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h939 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
940 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
941 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
942 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
943 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
944 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h430 #define REG_DVI_PS2_BASE 0x113680 // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h527 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h525 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h567 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h546 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h548 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h554 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h540 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h546 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h921 #define REG_DVI_PS2_00_L (REG_DVI_PS2_BASE + 0x00)
922 #define REG_DVI_PS2_00_H (REG_DVI_PS2_BASE + 0x01)
923 #define REG_DVI_PS2_01_L (REG_DVI_PS2_BASE + 0x02)
924 #define REG_DVI_PS2_01_H (REG_DVI_PS2_BASE + 0x03)
925 #define REG_DVI_PS2_0B_L (REG_DVI_PS2_BASE + 0x16)
926 #define REG_DVI_PS2_0B_H (REG_DVI_PS2_BASE + 0x17)
H A Dmhal_xc_chip_config.h508 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h601 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h613 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h618 #define REG_DVI_PS2_BASE 0x113680UL // DVI power saving2 macro

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