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Searched refs:REG_DVI_PS1_BASE (Results 1 – 25 of 31) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h932 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
933 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
934 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
935 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
936 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
937 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h429 #define REG_DVI_PS1_BASE 0x113640 // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h932 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
933 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
934 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
935 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
936 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
937 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h429 #define REG_DVI_PS1_BASE 0x113640 // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h526 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h524 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h566 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h545 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h547 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h553 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h539 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h545 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h914 #define REG_DVI_PS1_00_L (REG_DVI_PS1_BASE + 0x00)
915 #define REG_DVI_PS1_00_H (REG_DVI_PS1_BASE + 0x01)
916 #define REG_DVI_PS1_01_L (REG_DVI_PS1_BASE + 0x02)
917 #define REG_DVI_PS1_01_H (REG_DVI_PS1_BASE + 0x03)
918 #define REG_DVI_PS1_0B_L (REG_DVI_PS1_BASE + 0x16)
919 #define REG_DVI_PS1_0B_H (REG_DVI_PS1_BASE + 0x17)
H A Dmhal_xc_chip_config.h507 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h600 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h612 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h617 #define REG_DVI_PS1_BASE 0x113640UL // DVI power saving1 macro

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