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Searched refs:REG_DVI_DTOP_DUAL_P2_BASE (Results 1 – 25 of 27) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4635 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4636 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4637 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4638 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4639 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4640 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4641 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4642 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4643 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4644 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h594 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4637 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4638 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4639 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4640 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4641 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4642 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4643 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4644 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4645 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4646 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h576 #define REG_DVI_DTOP_DUAL_P2_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4631 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4632 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4633 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4634 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4635 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4636 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4637 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4638 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4639 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4640 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h554 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4637 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4638 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4639 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4640 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4641 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4642 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4643 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4644 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4645 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4646 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h578 #define REG_DVI_DTOP_DUAL_P2_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4631 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4632 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4633 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4634 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4635 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4636 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4637 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4638 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4639 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4640 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h581 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4637 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4638 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4639 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4640 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4641 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4642 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4643 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4644 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4645 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4646 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h570 #define REG_DVI_DTOP_DUAL_P2_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4637 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4638 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4639 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4640 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4641 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4642 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4643 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4644 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4645 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4646 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h576 #define REG_DVI_DTOP_DUAL_P2_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4631 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4632 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4633 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4634 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4635 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4636 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4637 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4638 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4639 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4640 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h552 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4632 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4633 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4634 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4635 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4636 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4637 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4638 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4639 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4640 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4641 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h535 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4631 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4632 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4633 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4634 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4635 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4636 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4637 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4638 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4639 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4640 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h628 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4635 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4636 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4637 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4638 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4639 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4640 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4641 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4642 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4643 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4644 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h640 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4635 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4636 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4637 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4638 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4639 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4640 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4641 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4642 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4643 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4644 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4635 #define REG_DVI_DTOP_DUAL_P2_00_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x00)
4636 #define REG_DVI_DTOP_DUAL_P2_00_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x01)
4637 #define REG_DVI_DTOP_DUAL_P2_01_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x02)
4638 #define REG_DVI_DTOP_DUAL_P2_01_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x03)
4639 #define REG_DVI_DTOP_DUAL_P2_02_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x04)
4640 #define REG_DVI_DTOP_DUAL_P2_02_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x05)
4641 #define REG_DVI_DTOP_DUAL_P2_03_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x06)
4642 #define REG_DVI_DTOP_DUAL_P2_03_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x07)
4643 #define REG_DVI_DTOP_DUAL_P2_04_L (REG_DVI_DTOP_DUAL_P2_BASE + 0x08)
4644 #define REG_DVI_DTOP_DUAL_P2_04_H (REG_DVI_DTOP_DUAL_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h645 #define REG_DVI_DTOP_DUAL_P2_BASE 0x171600UL macro

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