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Searched refs:REG_DVI_DTOP_DUAL_P1_BASE (Results 1 – 25 of 27) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4099 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4100 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4101 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4102 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4103 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4104 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4105 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4106 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4107 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4108 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h591 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4101 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4102 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4103 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4104 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4105 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4106 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4107 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4108 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4109 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4110 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h573 #define REG_DVI_DTOP_DUAL_P1_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4097 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4098 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4099 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4100 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4101 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4102 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4103 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4104 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4105 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4106 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h551 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4101 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4102 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4103 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4104 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4105 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4106 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4107 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4108 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4109 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4110 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h575 #define REG_DVI_DTOP_DUAL_P1_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4097 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4098 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4099 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4100 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4101 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4102 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4103 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4104 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4105 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4106 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h578 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4101 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4102 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4103 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4104 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4105 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4106 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4107 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4108 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4109 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4110 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h567 #define REG_DVI_DTOP_DUAL_P1_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4101 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4102 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4103 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4104 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4105 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4106 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4107 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4108 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4109 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4110 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h573 #define REG_DVI_DTOP_DUAL_P1_BASE REG_DVI_DTOP_DUAL_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4097 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4098 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4099 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4100 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4101 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4102 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4103 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4104 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4105 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4106 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h549 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4098 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4099 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4100 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4101 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4102 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4103 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4104 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4105 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4106 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4107 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h532 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4097 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4098 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4099 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4100 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4101 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4102 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4103 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4104 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4105 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4106 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h625 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4099 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4100 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4101 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4102 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4103 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4104 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4105 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4106 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4107 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4108 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h637 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4099 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4100 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4101 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4102 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4103 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4104 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4105 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4106 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4107 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4108 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4099 #define REG_DVI_DTOP_DUAL_P1_00_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x00)
4100 #define REG_DVI_DTOP_DUAL_P1_00_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x01)
4101 #define REG_DVI_DTOP_DUAL_P1_01_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x02)
4102 #define REG_DVI_DTOP_DUAL_P1_01_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x03)
4103 #define REG_DVI_DTOP_DUAL_P1_02_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x04)
4104 #define REG_DVI_DTOP_DUAL_P1_02_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x05)
4105 #define REG_DVI_DTOP_DUAL_P1_03_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x06)
4106 #define REG_DVI_DTOP_DUAL_P1_03_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x07)
4107 #define REG_DVI_DTOP_DUAL_P1_04_L (REG_DVI_DTOP_DUAL_P1_BASE + 0x08)
4108 #define REG_DVI_DTOP_DUAL_P1_04_H (REG_DVI_DTOP_DUAL_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h642 #define REG_DVI_DTOP_DUAL_P1_BASE 0x171300UL macro

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