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Searched refs:REG_DVI_DTOP_DUAL_P1_60_L (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c1683 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c1699 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c1715 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c1715 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c1715 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c1715 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c1715 …W2BYTEMSK(REG_DVI_DTOP_DUAL_P1_60_L, bEnableFlag? BMASK(10:8): 0, BMASK(10:8)); // [8]: MHL3 engin… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c438 if((R2BYTE(REG_DVI_DTOP_DUAL_P1_60_L) &BIT(8))) // MHL3 enable in _Hal_tmds_GetMHL3ClockStableFlag()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c431 if((R2BYTE(REG_DVI_DTOP_DUAL_P1_60_L) &BIT(8))) // MHL3 enable in _Hal_tmds_GetMHL3ClockStableFlag()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c438 if((R2BYTE(REG_DVI_DTOP_DUAL_P1_60_L) &BIT(8))) // MHL3 enable in _Hal_tmds_GetMHL3ClockStableFlag()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c497 if((R2BYTE(REG_DVI_DTOP_DUAL_P1_60_L) &BIT(8))) // MHL3 enable in _Hal_tmds_GetMHL3ClockStableFlag()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c497 if((R2BYTE(REG_DVI_DTOP_DUAL_P1_60_L) &BIT(8))) // MHL3 enable in _Hal_tmds_GetMHL3ClockStableFlag()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h4291 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h4293 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h4289 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h4293 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h4289 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h4293 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h4293 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h4289 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h4290 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h4289 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h4291 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h4291 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h4291 #define REG_DVI_DTOP_DUAL_P1_60_L (REG_DVI_DTOP_DUAL_P1_BASE + 0xC0) macro