| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_hdmi.c | 2389 u16regvalue = R2BYTEMSK(REG_DVI_DTOP_17_L+u16bank_offset, HBMASK); in Hal_DVI_clklose_det()
3495 usClockRate = (R2BYTE(REG_DVI_DTOP_17_L) & BMASK(11:0)) *12 /128; in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_hdmi.c | 2389 u16regvalue = R2BYTEMSK(REG_DVI_DTOP_17_L+u16bank_offset, HBMASK); in Hal_DVI_clklose_det()
3495 usClockRate = (R2BYTE(REG_DVI_DTOP_17_L) & BMASK(11:0)) *12 /128; in Hal_HDMI_StablePolling()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/ |
| H A D | halMHL.c | 1033 usClkCount = R2BYTE(REG_DVI_DTOP_17_L) & 0x0FFF; in _mhal_mhl_CheckClockStatus()
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| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/ |
| H A D | halMHL.c | 1033 usClkCount = R2BYTE(REG_DVI_DTOP_17_L) & 0x0FFF; in _mhal_mhl_CheckClockStatus()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_hdmi.h | 148 #define REG_DVI_DTOP_17_L (REG_DVI_DTOP_BASE + 0x2E) macro
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