Home
last modified time | relevance | path

Searched refs:REG_DVI_ATOP3_71_L (Results 1 – 19 of 19) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c333 W2BYTE(REG_DVI_ATOP3_71_L, BIT(14)); in Hal_HDCP22_PollingWriteDone()
334 W2BYTE(REG_DVI_ATOP3_71_L, 0); in Hal_HDCP22_PollingWriteDone()
399 W2BYTE(REG_DVI_ATOP3_71_L, BIT(14)); in Hal_HDCP22_PollingReadDone()
400 W2BYTE(REG_DVI_ATOP3_71_L, 0); in Hal_HDCP22_PollingReadDone()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c333 W2BYTE(REG_DVI_ATOP3_71_L, BIT(14)); in Hal_HDCP22_PollingWriteDone()
334 W2BYTE(REG_DVI_ATOP3_71_L, 0); in Hal_HDCP22_PollingWriteDone()
399 W2BYTE(REG_DVI_ATOP3_71_L, BIT(14)); in Hal_HDCP22_PollingReadDone()
400 W2BYTE(REG_DVI_ATOP3_71_L, 0); in Hal_HDCP22_PollingReadDone()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhalMHL.c980 W2BYTEMSK(REG_DVI_ATOP3_71_L, BIT(8), BIT(8)); in _mhal_mhl_ClockBigChangeFlag()
981 W2BYTEMSK(REG_DVI_ATOP3_71_L, 0, BIT(8)); in _mhal_mhl_ClockBigChangeFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhalMHL.c980 W2BYTEMSK(REG_DVI_ATOP3_71_L, BIT(8), BIT(8)); in _mhal_mhl_ClockBigChangeFlag()
981 W2BYTEMSK(REG_DVI_ATOP3_71_L, 0, BIT(8)); in _mhal_mhl_ClockBigChangeFlag()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h904 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h904 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h886 #define REG_DVI_ATOP3_71_L (REG_DVI_ATOP3_BASE + 0xE2) macro