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Searched refs:REG_DVI_ATOP2_5E_L (Results 1 – 25 of 32) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c2790 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2795 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2800 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2805 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c3650 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3655 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3660 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_MEDIUM, BMASK(4:0)); //[4]: ICtrl overw… in Hal_HDMI_StablePolling()
3665 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_LOW, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c3650 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3655 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3660 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_MEDIUM, BMASK(4:0)); //[4]: ICtrl overw… in Hal_HDMI_StablePolling()
3665 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_LOW, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c3527 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3532 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3537 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3542 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhalMHL.c488 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, 0, BMASK(4:0)); //[4]: overwrtie DPL ICTL value, [3:0]: ictl overwrt… in _mhal_mhl_HdmiBypassModeSetting()
626 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4) |ucIControlValue, BMASK(4:0)); // enable to overwrtie DPL ICT… in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhalMHL.c488 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, 0, BMASK(4:0)); //[4]: overwrtie DPL ICTL value, [3:0]: ictl overwrt… in _mhal_mhl_HdmiBypassModeSetting()
626 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4) |ucIControlValue, BMASK(4:0)); // enable to overwrtie DPL ICT… in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c5149 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5154 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5159 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5164 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c5249 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5254 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5259 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5264 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c5287 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5292 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5297 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5302 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c5249 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5254 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5259 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5264 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c5260 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5265 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5270 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5275 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c5287 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5292 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5297 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5302 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c5852 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5857 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5862 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5867 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c5855 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5860 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5865 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5870 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c5558 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5563 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5568 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5573 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c5858 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5863 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5868 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5873 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c5558 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5563 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5568 … W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5573 …W2BYTEMSK(REG_DVI_ATOP2_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h834 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h834 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h822 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h822 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h822 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h822 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h822 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h822 #define REG_DVI_ATOP2_5E_L (REG_DVI_ATOP2_BASE + 0xBC) macro

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