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Searched refs:REG_DVI_ATOP1_5E_L (Results 1 – 25 of 32) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c2708 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2713 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2718 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
2723 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c3534 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3539 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3544 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_MEDIUM, BMASK(4:0)); //[4]: ICtrl overw… in Hal_HDMI_StablePolling()
3549 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_LOW, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c3534 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3539 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_HIGH, BMASK(4:0)); //[4]: ICtrl overwri… in Hal_HDMI_StablePolling()
3544 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_MEDIUM, BMASK(4:0)); //[4]: ICtrl overw… in Hal_HDMI_StablePolling()
3549 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)| HDMI_I_CONTROL_VALUE_LOW, BMASK(4:0)); //[4]: ICtrl overwrit… in Hal_HDMI_StablePolling()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c3445 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3450 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3455 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
3460 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mustang/mhl/internal/
H A DhalMHL.c431 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, 0, BMASK(4:0)); //[4]: overwrtie DPL ICTL value, [3:0]: ictl overwrt… in _mhal_mhl_HdmiBypassModeSetting()
566 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4) |ucIControlValue, BMASK(4:0)); // enable to overwrtie DPL ICT… in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maldives/mhl/internal/
H A DhalMHL.c431 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, 0, BMASK(4:0)); //[4]: overwrtie DPL ICTL value, [3:0]: ictl overwrt… in _mhal_mhl_HdmiBypassModeSetting()
566 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4) |ucIControlValue, BMASK(4:0)); // enable to overwrtie DPL ICT… in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c5067 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5072 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5077 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5082 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c5167 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5172 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5177 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5182 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c5205 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5210 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5215 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5220 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c5167 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5172 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5177 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5182 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c5178 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5183 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5188 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5193 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c5205 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5210 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5215 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5220 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c5770 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5775 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5780 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5785 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c5773 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5778 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5783 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5788 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c5476 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5481 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5486 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5491 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c5776 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5781 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5786 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5791 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c5476 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5481 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5486 … W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl value in Hal_DVI_HF_adjust()
5491 …W2BYTEMSK(REG_DVI_ATOP1_5E_L, BIT(4)|BMASK(2:0), BMASK(4:0)); //[4]: ICtrl overwrite, [3:0]: ICtrl… in Hal_DVI_HF_adjust()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h800 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h800 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h792 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h792 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h792 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h792 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h792 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h792 #define REG_DVI_ATOP1_5E_L (REG_DVI_ATOP1_BASE + 0xBC) macro

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