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Searched refs:REG_COMBO_PHY1_P2_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h584 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2789 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2790 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2791 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2792 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2793 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2794 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2795 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2796 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2797 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2798 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h566 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h544 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2789 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2790 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2791 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2792 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2793 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2794 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2795 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2796 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2797 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2798 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h568 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h571 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2789 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2790 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2791 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2792 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2793 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2794 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2795 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2796 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2797 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2798 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h560 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2789 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2790 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2791 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2792 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2793 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2794 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2795 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2796 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2797 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2798 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h566 #define REG_COMBO_PHY1_P2_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h542 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2788 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2789 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2790 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2791 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2792 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2793 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2794 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2795 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2796 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2797 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h525 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h618 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h630 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h2787 #define REG_COMBO_PHY1_P2_00_L (REG_COMBO_PHY1_P2_BASE + 0x00)
2788 #define REG_COMBO_PHY1_P2_00_H (REG_COMBO_PHY1_P2_BASE + 0x01)
2789 #define REG_COMBO_PHY1_P2_01_L (REG_COMBO_PHY1_P2_BASE + 0x02)
2790 #define REG_COMBO_PHY1_P2_01_H (REG_COMBO_PHY1_P2_BASE + 0x03)
2791 #define REG_COMBO_PHY1_P2_02_L (REG_COMBO_PHY1_P2_BASE + 0x04)
2792 #define REG_COMBO_PHY1_P2_02_H (REG_COMBO_PHY1_P2_BASE + 0x05)
2793 #define REG_COMBO_PHY1_P2_03_L (REG_COMBO_PHY1_P2_BASE + 0x06)
2794 #define REG_COMBO_PHY1_P2_03_H (REG_COMBO_PHY1_P2_BASE + 0x07)
2795 #define REG_COMBO_PHY1_P2_04_L (REG_COMBO_PHY1_P2_BASE + 0x08)
2796 #define REG_COMBO_PHY1_P2_04_H (REG_COMBO_PHY1_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h635 #define REG_COMBO_PHY1_P2_BASE 0x170700UL macro

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