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Searched refs:REG_COMBO_PHY1_P1_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h582 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2273 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2274 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2275 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2276 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2277 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2278 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2279 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2280 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2281 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2282 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h564 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h542 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2273 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2274 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2275 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2276 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2277 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2278 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2279 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2280 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2281 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2282 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h566 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h569 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2273 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2274 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2275 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2276 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2277 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2278 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2279 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2280 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2281 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2282 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h558 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2273 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2274 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2275 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2276 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2277 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2278 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2279 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2280 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2281 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2282 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h564 #define REG_COMBO_PHY1_P1_BASE REG_COMBO_PHY1_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h540 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2272 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2273 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2274 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2275 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2276 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2277 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2278 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2279 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2280 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2281 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h523 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h616 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h628 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h2271 #define REG_COMBO_PHY1_P1_00_L (REG_COMBO_PHY1_P1_BASE + 0x00)
2272 #define REG_COMBO_PHY1_P1_00_H (REG_COMBO_PHY1_P1_BASE + 0x01)
2273 #define REG_COMBO_PHY1_P1_01_L (REG_COMBO_PHY1_P1_BASE + 0x02)
2274 #define REG_COMBO_PHY1_P1_01_H (REG_COMBO_PHY1_P1_BASE + 0x03)
2275 #define REG_COMBO_PHY1_P1_02_L (REG_COMBO_PHY1_P1_BASE + 0x04)
2276 #define REG_COMBO_PHY1_P1_02_H (REG_COMBO_PHY1_P1_BASE + 0x05)
2277 #define REG_COMBO_PHY1_P1_03_L (REG_COMBO_PHY1_P1_BASE + 0x06)
2278 #define REG_COMBO_PHY1_P1_03_H (REG_COMBO_PHY1_P1_BASE + 0x07)
2279 #define REG_COMBO_PHY1_P1_04_L (REG_COMBO_PHY1_P1_BASE + 0x08)
2280 #define REG_COMBO_PHY1_P1_04_H (REG_COMBO_PHY1_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h633 #define REG_COMBO_PHY1_P1_BASE 0x170500UL macro

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