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Searched refs:REG_COMBO_PHY1_P0_0D_L (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c3750 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
3769 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c3750 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
3769 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c4176 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c4200 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c4658 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c4658 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c4658 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c4658 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c4658 …W2BYTEMSK(REG_COMBO_PHY1_P0_0D_L, (ucLinkRate << 12), BMASK(13:12)); // [13:12]: Select MHL3 data … in mhal_mhl_SetMainLinkRate()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1783 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1783 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1783 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1783 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1782 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h1781 #define REG_COMBO_PHY1_P0_0D_L (REG_COMBO_PHY1_P0_BASE + 0x1A) macro