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Searched refs:REG_COMBO_PHY0_P3_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h585 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3047 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3048 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3049 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3050 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3051 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3052 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3053 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3054 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3055 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3056 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h567 #define REG_COMBO_PHY0_P3_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h545 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3047 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3048 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3049 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3050 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3051 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3052 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3053 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3054 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3055 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3056 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h569 #define REG_COMBO_PHY0_P3_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
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H A Dmhal_xc_chip_config.h572 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3047 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3048 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3049 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3050 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3051 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3052 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3053 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3054 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3055 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3056 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h561 #define REG_COMBO_PHY0_P3_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3047 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3048 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3049 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3050 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3051 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3052 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3053 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3054 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3055 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3056 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h567 #define REG_COMBO_PHY0_P3_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h543 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h3046 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3047 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3048 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3049 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3050 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3051 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3052 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3053 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3054 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3055 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h526 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h619 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h631 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h3045 #define REG_COMBO_PHY0_P3_00_L (REG_COMBO_PHY0_P3_BASE + 0x00)
3046 #define REG_COMBO_PHY0_P3_00_H (REG_COMBO_PHY0_P3_BASE + 0x01)
3047 #define REG_COMBO_PHY0_P3_01_L (REG_COMBO_PHY0_P3_BASE + 0x02)
3048 #define REG_COMBO_PHY0_P3_01_H (REG_COMBO_PHY0_P3_BASE + 0x03)
3049 #define REG_COMBO_PHY0_P3_02_L (REG_COMBO_PHY0_P3_BASE + 0x04)
3050 #define REG_COMBO_PHY0_P3_02_H (REG_COMBO_PHY0_P3_BASE + 0x05)
3051 #define REG_COMBO_PHY0_P3_03_L (REG_COMBO_PHY0_P3_BASE + 0x06)
3052 #define REG_COMBO_PHY0_P3_03_H (REG_COMBO_PHY0_P3_BASE + 0x07)
3053 #define REG_COMBO_PHY0_P3_04_L (REG_COMBO_PHY0_P3_BASE + 0x08)
3054 #define REG_COMBO_PHY0_P3_04_H (REG_COMBO_PHY0_P3_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h636 #define REG_COMBO_PHY0_P3_BASE 0x170800UL macro

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