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Searched refs:REG_COMBO_PHY0_P3_6C_L (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c646 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_20_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
1737 …W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, ((bEnableFlag? MHL_ICONTROL_PD_30_VALUE: MHL_ICONTROL_PD_20_VALU… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c646 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_20_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
1737 …W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, ((bEnableFlag? MHL_ICONTROL_PD_30_VALUE: MHL_ICONTROL_PD_20_VALU… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c646 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_20_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
1737 …W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, ((bEnableFlag? MHL_ICONTROL_PD_30_VALUE: MHL_ICONTROL_PD_20_VALU… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c646 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_20_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
1737 …W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, ((bEnableFlag? MHL_ICONTROL_PD_30_VALUE: MHL_ICONTROL_PD_20_VALU… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c646 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_20_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
1737 …W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, ((bEnableFlag? MHL_ICONTROL_PD_30_VALUE: MHL_ICONTROL_PD_20_VALU… in _mhal_mhl_Version3PhyEnable()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c586 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c600 … W2BYTEMSK(REG_COMBO_PHY0_P3_6C_L, (MHL_ICONTROL_PD_VALUE << 9), BMASK(13:9)); // I-control PD in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h3263 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h3263 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h3263 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h3263 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h3262 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h3261 #define REG_COMBO_PHY0_P3_6C_L (REG_COMBO_PHY0_P3_BASE + 0xD8) macro