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Searched refs:REG_COMBO_PHY0_P2_BASE (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h583 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2531 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2532 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2533 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2534 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2535 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2536 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2537 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2538 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2539 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2540 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h565 #define REG_COMBO_PHY0_P2_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h543 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2531 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2532 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2533 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2534 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2535 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2536 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2537 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2538 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2539 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2540 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h567 #define REG_COMBO_PHY0_P2_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h570 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2531 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2532 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2533 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2534 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2535 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2536 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2537 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2538 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2539 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2540 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h559 #define REG_COMBO_PHY0_P2_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2531 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2532 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2533 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2534 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2535 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2536 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2537 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2538 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2539 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2540 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h565 #define REG_COMBO_PHY0_P2_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h541 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2530 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2531 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2532 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2533 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2534 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2535 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2536 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2537 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2538 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2539 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h524 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h617 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h629 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h2529 #define REG_COMBO_PHY0_P2_00_L (REG_COMBO_PHY0_P2_BASE + 0x00)
2530 #define REG_COMBO_PHY0_P2_00_H (REG_COMBO_PHY0_P2_BASE + 0x01)
2531 #define REG_COMBO_PHY0_P2_01_L (REG_COMBO_PHY0_P2_BASE + 0x02)
2532 #define REG_COMBO_PHY0_P2_01_H (REG_COMBO_PHY0_P2_BASE + 0x03)
2533 #define REG_COMBO_PHY0_P2_02_L (REG_COMBO_PHY0_P2_BASE + 0x04)
2534 #define REG_COMBO_PHY0_P2_02_H (REG_COMBO_PHY0_P2_BASE + 0x05)
2535 #define REG_COMBO_PHY0_P2_03_L (REG_COMBO_PHY0_P2_BASE + 0x06)
2536 #define REG_COMBO_PHY0_P2_03_H (REG_COMBO_PHY0_P2_BASE + 0x07)
2537 #define REG_COMBO_PHY0_P2_04_L (REG_COMBO_PHY0_P2_BASE + 0x08)
2538 #define REG_COMBO_PHY0_P2_04_H (REG_COMBO_PHY0_P2_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h634 #define REG_COMBO_PHY0_P2_BASE 0x170600UL macro

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