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Searched refs:REG_COMBO_PHY0_P1_BASE (Results 1 – 25 of 27) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h581 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h2015 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2016 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2017 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2018 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2019 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2020 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2021 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2022 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2023 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2024 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h563 #define REG_COMBO_PHY0_P1_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h541 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h2015 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2016 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2017 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2018 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2019 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2020 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2021 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2022 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2023 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2024 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h565 #define REG_COMBO_PHY0_P1_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h568 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h2015 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2016 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2017 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2018 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2019 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2020 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2021 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2022 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2023 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2024 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h557 #define REG_COMBO_PHY0_P1_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h2015 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2016 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2017 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2018 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2019 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2020 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2021 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2022 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2023 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2024 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h563 #define REG_COMBO_PHY0_P1_BASE REG_COMBO_PHY0_P0_BASE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h539 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h2014 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2015 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2016 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2017 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2018 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2019 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2020 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2021 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2022 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2023 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h522 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h615 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h627 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h2013 #define REG_COMBO_PHY0_P1_00_L (REG_COMBO_PHY0_P1_BASE + 0x00)
2014 #define REG_COMBO_PHY0_P1_00_H (REG_COMBO_PHY0_P1_BASE + 0x01)
2015 #define REG_COMBO_PHY0_P1_01_L (REG_COMBO_PHY0_P1_BASE + 0x02)
2016 #define REG_COMBO_PHY0_P1_01_H (REG_COMBO_PHY0_P1_BASE + 0x03)
2017 #define REG_COMBO_PHY0_P1_02_L (REG_COMBO_PHY0_P1_BASE + 0x04)
2018 #define REG_COMBO_PHY0_P1_02_H (REG_COMBO_PHY0_P1_BASE + 0x05)
2019 #define REG_COMBO_PHY0_P1_03_L (REG_COMBO_PHY0_P1_BASE + 0x06)
2020 #define REG_COMBO_PHY0_P1_03_H (REG_COMBO_PHY0_P1_BASE + 0x07)
2021 #define REG_COMBO_PHY0_P1_04_L (REG_COMBO_PHY0_P1_BASE + 0x08)
2022 #define REG_COMBO_PHY0_P1_04_H (REG_COMBO_PHY0_P1_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h632 #define REG_COMBO_PHY0_P1_BASE 0x170400UL macro

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