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Searched refs:REG_COMBO_PHY0_P0_6B_L (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c302 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
322 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
382 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
402 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c302 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
322 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
382 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
402 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c421 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_HdmiBypassModeSetting()
426 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (pMHLSignalStatus->ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
545 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_Mhl24bitsModeSetting()
559 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, usImpedanceSetting, BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c421 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_HdmiBypassModeSetting()
426 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (pMHLSignalStatus->ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
545 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_Mhl24bitsModeSetting()
559 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, usImpedanceSetting, BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c421 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_HdmiBypassModeSetting()
426 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (pMHLSignalStatus->ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
545 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_Mhl24bitsModeSetting()
559 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, usImpedanceSetting, BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c421 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_HdmiBypassModeSetting()
426 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (pMHLSignalStatus->ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
545 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_Mhl24bitsModeSetting()
559 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, usImpedanceSetting, BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c473 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
504 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bSettingFlag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable cl… in _Hal_tmds_YUV420PHYSetting()
556 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
2640 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x; [1]: reg_atop_e… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c421 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_HdmiBypassModeSetting()
426 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (pMHLSignalStatus->ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
545 pMHLSignalStatus->ucImpedanceValue = R2BYTE(REG_COMBO_PHY0_P0_6B_L) >> 12; in _mhal_mhl_Mhl24bitsModeSetting()
559 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, usImpedanceSetting, BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c705 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
757 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
852 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4099 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c716 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
768 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
863 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4208 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c716 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
768 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
863 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4208 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c777 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
829 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
924 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4144 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_hdmi.c708 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
760 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
855 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4775 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_hdmi.c708 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
760 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
855 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4778 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c843 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
895 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
990 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4335 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_hdmi.c708 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
760 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
855 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4781 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c843 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
895 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
990 … W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(11:8), BMASK(11:8)); // reg_atop_gc_ictrl_pfd_ov in _Hal_tmds_EQBandWidthSetting()
4335 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c419 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
526 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c376 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, BMASK(2:1), BMASK(2:1)); // [2]: enable clko_pix 2x; [1]: reg_at… in _Hal_tmds_HDMI20PHYSetting()
1905 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x; [1]: reg_atop_e… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c421 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (MHL_IMPEDANCE_VALUE << 12), BMASK(15:12)); in _mhal_mhl_HdmiBypassModeSetting()
536 W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, (ucImpedanceValue << 12), BMASK(15:12)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c787 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
839 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
4213 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c787 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bHDMI20Flag? BIT(1): BMASK(2:1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_HDMI20PHYSetting()
839 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L, bYUV420Flag? BMASK(2:1): BIT(1), BMASK(2:1)); // [2]: enable clk… in _Hal_tmds_YUV420PHYSetting()
4213 …W2BYTEMSK(REG_COMBO_PHY0_P0_6B_L + u16bank_offset, 0x0706, BMASK(11:0));// [2]: enable clko_pix 2x… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1711 #define REG_COMBO_PHY0_P0_6B_L (REG_COMBO_PHY0_P0_BASE + 0xD6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1713 #define REG_COMBO_PHY0_P0_6B_L (REG_COMBO_PHY0_P0_BASE + 0xD6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1711 #define REG_COMBO_PHY0_P0_6B_L (REG_COMBO_PHY0_P0_BASE + 0xD6) macro

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