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Searched refs:REG_COMBO_PHY0_P0_59_L (Results 1 – 25 of 25) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c301 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
321 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
381 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8)); in _mhal_mhl_Mhl24bitsModeSetting()
401 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c301 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
321 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
381 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8)); in _mhal_mhl_Mhl24bitsModeSetting()
401 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c418 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
525 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c420 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, 0, BIT(8)); in _mhal_mhl_HdmiBypassModeSetting()
535 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(8), BIT(8)); in _mhal_mhl_Mhl24bitsModeSetting()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_hdmi.c1962 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_hdmi.c2697 W2BYTEMSK(REG_COMBO_PHY0_P0_59_L, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_hdmi.c4158 … W2BYTEMSK(REG_COMBO_PHY0_P0_59_L + u16bank_offset, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_hdmi.c4267 … W2BYTEMSK(REG_COMBO_PHY0_P0_59_L + u16bank_offset, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_hdmi.c4267 … W2BYTEMSK(REG_COMBO_PHY0_P0_59_L + u16bank_offset, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c4209 … W2BYTEMSK(REG_COMBO_PHY0_P0_59_L + u16bank_offset, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c4393 … W2BYTEMSK(REG_COMBO_PHY0_P0_59_L + u16bank_offset, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c4393 … W2BYTEMSK(REG_COMBO_PHY0_P0_59_L + u16bank_offset, BIT(1), BIT(1)); // [1]:atop_en_pd_phdac_ove=1 in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1677 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1677 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1677 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1677 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1676 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h1675 #define REG_COMBO_PHY0_P0_59_L (REG_COMBO_PHY0_P0_BASE + 0xB2) macro