Searched refs:REG_CLKGEN1_DC1_STC7_CW_L (Results 1 – 2 of 2) sorted by relevance
212 #define REG_CLKGEN1_DC1_STC7_CW_L 0x6D macro
2309 TSP_CLKGEN1_REG(REG_CLKGEN1_DC1_STC7_CW_L) = 0x0000; in HAL_TSP_STC_Init()2398 *u32Sync = TSP_CLKGEN1_REG(REG_CLKGEN1_DC1_STC7_CW_L); in HAL_TSP_GetSTCSynth()2504 TSP_CLKGEN1_REG(REG_CLKGEN1_DC1_STC7_CW_L) = u32Sync & 0xFFFF; in HAL_TSP_SetSTCSynth()