Searched refs:REG_CLKGEN1_DC0_STC5_CW_H (Results 1 – 2 of 2) sorted by relevance
186 #define REG_CLKGEN1_DC0_STC5_CW_H 0x5E macro
2306 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC5_CW_H) = 0x2800; in HAL_TSP_STC_Init()2389 *u32Sync |= TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC5_CW_H) << 16 ; in HAL_TSP_GetSTCSynth()2479 TSP_CLKGEN1_REG(REG_CLKGEN1_DC0_STC5_CW_H) = u32Sync >> 16; in HAL_TSP_SetSTCSynth()