Searched refs:REG_CLKGEN0_TS4_SHIFT (Results 1 – 2 of 2) sorted by relevance
529 …S4_CLK) = (TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) & ~(REG_CLKGEN0_TS_MASK << REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_Power()623 … = _SET_(TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK),(REG_CLKGEN0_TS_DISABLE << REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_Power()896 …(REG_CLKGEN0_TS4_CLK) & ~(REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS4_SHIFT)) | (clk_src<<(REG_CLKGEN0_TS… in HAL_TSP_TSIF_SelPad()943 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) |= ((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()972 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) &= ~((REG_CLKGEN0_TS_INVERT)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkInv()1025 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) |= ((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()1071 …N0_REG(REG_CLKGEN0_TS4_CLK) & (REG_CLKGEN0_TS_MASK<<REG_CLKGEN0_TS4_SHIFT)) >> (REG_CLKGEN0_TS4_SH… in HAL_TSP_TSIF_SelPad_ClkDis()1108 … TSP_CLKGEN0_REG(REG_CLKGEN0_TS4_CLK) &= ~((REG_CLKGEN0_TS_DISABLE)<<(REG_CLKGEN0_TS4_SHIFT)); in HAL_TSP_TSIF_SelPad_ClkDis()
100 #define REG_CLKGEN0_TS4_SHIFT 0 macro