Searched refs:REG_CKG_DAC1 (Results 1 – 14 of 14) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/pws/hal/curry/pws/ |
| H A D | halPWS.c | 253 …HAL_PWS_WriteByte(REG_CKG_DAC1, ((HAL_PWS_ReadByte(REG_CKG_DAC1) & ~CKG_DAC1_MASK) | CKG_DAC1_XTAL… in PwsPowerMonitorThread()
277 …HAL_PWS_WriteByte(REG_CKG_DAC1, (HAL_PWS_ReadByte(REG_CKG_DAC1) & ~CKG_DAC1_MASK) | CKG_DAC1_CLK_V… in PwsPowerMonitorThread()
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| H A D | regPWS.h | 160 #define REG_CKG_DAC1 (0x100BB2) macro
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| /utopia/UTPA2-700.0.x/modules/pws/hal/k6/pws/ |
| H A D | halPWS.c | 254 …HAL_PWS_WriteByte(REG_CKG_DAC1, ((HAL_PWS_ReadByte(REG_CKG_DAC1) & ~CKG_DAC1_MASK) | CKG_DAC1_XTAL… in PwsPowerMonitorThread()
275 …HAL_PWS_WriteByte(REG_CKG_DAC1, (HAL_PWS_ReadByte(REG_CKG_DAC1) & ~CKG_DAC1_MASK) | CKG_DAC1_CLK_V… in PwsPowerMonitorThread()
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| H A D | regPWS.h | 160 #define REG_CKG_DAC1 (0x100BB2) macro
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| /utopia/UTPA2-700.0.x/modules/pws/hal/k6lite/pws/ |
| H A D | halPWS.c | 254 …HAL_PWS_WriteByte(REG_CKG_DAC1, ((HAL_PWS_ReadByte(REG_CKG_DAC1) & ~CKG_DAC1_MASK) | CKG_DAC1_XTAL… in PwsPowerMonitorThread()
275 …HAL_PWS_WriteByte(REG_CKG_DAC1, (HAL_PWS_ReadByte(REG_CKG_DAC1) & ~CKG_DAC1_MASK) | CKG_DAC1_CLK_V… in PwsPowerMonitorThread()
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| H A D | regPWS.h | 160 #define REG_CKG_DAC1 (0x100BB2) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/ |
| H A D | halDAC.c | 767 …W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), (~bEnable), REG_CKG_DAC1_DISABLE_MASK); //set clock MUX for X/Y… in Hal_DAC_Enable()
851 W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), DacClk, 3:2); in Hal_DAC_SetOutputSource()
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| /utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/ |
| H A D | hwreg_dac.h | 142 #define REG_CKG_DAC1 (0x59) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/ |
| H A D | hwreg_dac.h | 142 #define REG_CKG_DAC1 (0x59) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/ |
| H A D | hwreg_dac.h | 142 #define REG_CKG_DAC1 (0x59) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/ |
| H A D | hwreg_dac.h | 142 #define REG_CKG_DAC1 (0x59) macro
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| /utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/ |
| H A D | halDAC.c | 1187 …W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), (~bEnable), REG_CKG_DAC1_DISABLE_MASK); //set clock MUX for X/Y… in Hal_DAC_Enable()
1271 W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), DacClk, 3:2); in Hal_DAC_SetOutputSource()
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/ |
| H A D | halDAC.c | 1190 …W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), (~bEnable), REG_CKG_DAC1_DISABLE_MASK); //set clock MUX for X/Y… in Hal_DAC_Enable()
1283 W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), DacClk, 3:2); in Hal_DAC_SetOutputSource()
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| /utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/ |
| H A D | halDAC.c | 1190 …W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), (~bEnable), REG_CKG_DAC1_DISABLE_MASK); //set clock MUX for X/Y… in Hal_DAC_Enable()
1283 W1BYTE(L_BK_CHIPTOP(REG_CKG_DAC1), DacClk, 3:2); in Hal_DAC_SetOutputSource()
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