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Searched refs:REG_ADC_ATOP_53_L (Results 1 – 25 of 37) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c2153 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2176 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2190 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c2153 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2176 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2190 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c2115 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2138 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2152 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c2115 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2138 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2152 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c2131 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2154 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2168 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c2115 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2138 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2152 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_adc.c2245 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2268 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2282 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_adc.c2237 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2260 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2274 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_adc.c2237 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2260 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2274 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_adc.c2237 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2260 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2274 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_adc.c2237 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0xE0 , 0xF0 ); // Change mux to null mux. in Hal_ADC_set_cvbs_out()
2260 MDrv_WriteByteMask(REG_ADC_ATOP_53_L, 0x00 , 0xF0 ); in Hal_ADC_set_cvbs_out()
2274 MDrv_WriteByte(REG_ADC_ATOP_53_L,0x0F); in Hal_ADC_set_cvbs_out()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
H A Dmhal_adctbl.c2610 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
H A Dmhal_adctbl.c2610 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
H A Dmhal_adctbl.c2561 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_atop.h271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) macro
H A Dmhal_adctbl.c2610 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_adctbl.c2718 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_adctbl.c2718 { DRV_ADC_REG(REG_ADC_ATOP_53_L), 0x0F, 0x00, 0x00/*CVBS0*/,

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