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Searched refs:REG_ADC_ATOP_52_L (Results 1 – 25 of 37) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c2165 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2171 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2210 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_adc.c2165 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2171 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2210 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_adc.c2127 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2133 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2172 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_adc.c2127 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2133 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2172 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_adc.c2143 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2149 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2188 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_adc.c2127 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2133 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2172 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_adc.c2257 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2263 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2302 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_adc.c2249 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2255 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2294 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_adc.c2249 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2255 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2294 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_adc.c2249 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2255 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2294 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_adc.c2249 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, BIT(0) , BIT(0) ); in Hal_ADC_set_cvbs_out()
2255 MDrv_WriteByteMask(REG_ADC_ATOP_52_L, 0x00 , BIT(0) ); in Hal_ADC_set_cvbs_out()
2294 if ( MDrv_ReadByte(REG_ADC_ATOP_52_L ) & BIT(0) ) in Hal_ADC_is_cvbs_out_enabled()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
H A Dmhal_adctbl.c2563 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
H A Dmhal_adctbl.c2563 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
H A Dmhal_adctbl.c2514 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_atop.h269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) macro
H A Dmhal_adctbl.c2563 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_adctbl.c2617 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/,
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_adctbl.c2617 { DRV_ADC_REG(REG_ADC_ATOP_52_L), 0xEF, 0x01, 0x00/*$OFF*/,

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