Searched refs:RASP1_BANK0_REG_CTRL_BASE (Results 1 – 10 of 10) sorted by relevance
425 #define RASP1_BANK0_REG_CTRL_BASE (0x23A00) //0x11D<<9 //bank 0x111D macro428 #define RASP1_BANK0_PIDFLT_BASE (RASP1_BANK0_REG_CTRL_BASE+0x80)
327 _RASPReg[1] = (REG_RASP*)(_u32RegBase + RASP1_BANK0_REG_CTRL_BASE); in HAL_NDSRASP_SetBank()